p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 373

• Manufacturer Part Number: p2125vps20
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

15.4.4
Before transmitting and receiving data, you should first clear the TE and RE bits in SCR to 0, then
initialize the SCI as shown in figure 15.5. When the operating mode, transfer format, etc., is
changed, the TE and RE bits must be cleared to 0 before making the change using the following
procedure. When the TE bit is cleared to 0, the TDRE flag in SSR is set to 1. Note that clearing
the RE bit to 0 does not initialize the contents of the RDRF, PER, FER, and ORER flags in SSR,
or the contents of RDR. When an external clock is used in asynchronous mode, the clock must be
supplied even during initialization.
SCI Initialization (Asynchronous Mode)
Set data transfer/receive format in
SCR to 1, and set RIE, TIE, TEIE,
Clear TE and RE bits in SCR to 0
Set CKE1 and CKE0 bits in SCR
<Initialization completion>
(TE and RE bits are 0)
1-bit interval elapsed?
Set TE and RE bits in
Start initialization
Set value in BRR
SMR and SCMR
and MPIE bits
Figure 15.5 Sample SCI Initialization Flowchart
Yes
Wait
No
[1]
[2]
[3]
[4]
[1]
[2]
[3]
[4]
Section 15 Serial Communication Interface (SCI)
Set the clock selection in SCR.
Be sure to clear bits RIE, TIE, TEIE, and
MPIE, and bits TE and RE, to 0.
When the clock is selected in
asynchronous mode, it is output
immediately after SCR settings are
made.
Set the data transfer/receive format in
SMR and SCMR.
Write a value corresponding to the bit
rate to BRR. Not necessary if an
external clock is used.
Wait at least one bit interval, then set the
TE bit or RE bit in SCR to 1. Also set
the RIE, TIE, TEIE, and MPIE bits.
Setting the TE and RE bits enables the
TxD and RxD pins to be used.
Rev. 1.00 Sep. 21, 2006 Page 335 of 658
REJ09B0310-0100