p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 120

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p2125vps20

Manufacturer Part Number
p2125vps20
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 5 Interrupt Controller
5.3.5
IER enables and disables interrupt requests IRQ7 to IRQ0.
• IER
5.3.6
ISR is a flag register that indicates the status of IRQ7 to IRQ0 interrupt requests.
• ISR
Note:
Rev. 1.00 Sep. 21, 2006 Page 82 of 658
REJ09B0310-0100
Bit
7
6
5
4
3
2
1
0
Bit
7
6
5
4
3
2
1
0
*
Bit Name
IRQ7E
IRQ6E
IRQ5E
IRQ4E
IRQ3E
IRQ2E
IRQ1E
IRQ0E
Bit Name
IRQ7F
IRQ6F
IRQ5F
IRQ4F
IRQ3F
IRQ2F
IRQ1F
IRQ0F
IRQ Enable Registers (IER)
IRQ Status Registers (ISR)
Only 0 can be written for clearing the flag.
Initial Value
0
0
0
0
0
0
0
0
Initial Value
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
Description
IRQn Enable
The IRQn interrupt request is enabled when this bit
is 1.
(n = 7 to 0)
Description
[Setting condition]
When the interrupt source selected by the ISCR
registers occurs
[Clearing conditions]
(n = 7 to 0)
When writing 0 to IRQnF flag after reading
IRQnF = 1
When interrupt exception handling is executed
when low-level detection is set and IRQn input is
high
When IRQn interrupt exception handling is
executed when falling-edge, rising-edge, or
both-edge detection is set

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