p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 451

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p2125vps20

Manufacturer Part Number
p2125vps20
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
(2)
Figure 16.20 shows the sample flowchart for the operations in slave receive mode (HNDS = 0).
Figure 16.20 Sample Flowchart for Operations in Slave Receive Mode (HNDS = 0)
Continuous Receive Operation
Read AASX, AAS and ADZ in ICSR
No
No
and TRS = 0 in ICCR
Set HNDS = 0 in ICXR
Set ACKB = 0 in ICSR
Set ACKB = 1 in ICSR
Slave receive mode
Read IRIC in ICCR
Clear IRIC in ICCR
Clear IRIC in ICCR
Clear IRIC in ICCR
Clear IRIC in ICCR
Read IRIC in ICCR
Clear IRIC in ICCR
Read TRS in ICCR
Wait for one frame
and ADZ = 1?
Set MST = 0
ICDRF = 1?
(n-2)th-byte
ICDRF = 1?
ESTP = 1 or
ICDRF = 1?
Read ICDR
Read ICDR
STOP = 1?
Read ICDR
reception?
IRIC = 1?
IRIC = 1?
TRS = 1?
AAS = 1
End
Yes
No
Yes
Yes
Yes
Yes
Yes
No
No
No
Yes
Yes
No
No
No
Yes
[3] to [7] Wait for one byte to be received (slave address + R/W)
[10] Read the receive data. The first read is a dummy read.
[11] Wait for one byte to be received
[1] Select slave receive mode.
* n: Address + total number of bytes received
[9] Wait for ACKB setting and set acknowledge data
[12] Detect stop condition
[2] Read the receive data remaining unread.
[8] Clear IRIC
[13] Clear IRIC
Slave transmit mode
[14] Read the last receive data
[15] Clear IRIC
General call address processing
(after the rise of the 9th clock of (n-1)th byte data)
for the last reception
(Set IRIC at the rise of the 9th clock)
(Set IRIC at the rise of the 9th clock)
* Description omitted
Rev. 1.00 Sep. 21, 2006 Page 413 of 658
Section 16 I
2
C Bus Interface (IIC)
REJ09B0310-0100

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