p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 534

• Manufacturer Part Number: p2125vps20
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Section 19 Flash Memory (0.18-µm F-ZTAT Version)
The NMI interrupt must be masked within the user system.
The interrupts that are held must be executed after all programming processings.
When a bus master other than the CPU, such as the DTC, acquires the bus, the error-protection
state is entered. Therefore, acquisition of the bus by the DTC must also be prohibited.
(j)
(k) Set the parameters required for programming.
The start address of the programming destination of the user MAT (FMPAR) is set to general
register ER1, and the start address of the program data area (FMPDR) is set to general register
ER0.
• Example of FMPAR setting
• Example of FMPDR setting
Rev. 1.00 Sep. 21, 2006 Page 496 of 658
REJ09B0310-0100
FMPAR specifies the programming destination address. When an address other than one in the
user MAT area is specified, even if the programming program is executed, programming is not
executed and an error is returned to the return value parameter FPFR. Since the programming
unit is 128 bytes, the lower eight bits of the address must be at the 128-byte boundary of H'00
or H'80.
When the storage destination of the program data is flash memory, even if the programming
execution routine is executed, programming is not executed and an error is returned to the
FPFR parameter. In this case, the program data must be transferred to the on-chip RAM before
programming is executed.
Set H'5A in FKEY and prepare the user MAT for programming.