st92f124 STMicroelectronics, st92f124 Datasheet - Page 81

• Manufacturer Part Number: st92f124
• Description: 8/16-bit Single Voltage Flash Mcu Family With Ram, E3 Tmemulated Eeprom, Can 2.0b And J1850 Blpd
• Manufacturer: STMicroelectronics

Page
(Dec)
24
26
28
SCI-A*
SCI-M
EFT0*
Block
R240
R241
R242
R243
R244
R245
R246
R247
R248
R248
R249
R250
R251
R252
R253
R254
R255
R240
R241
R242
R243
R244
R245
R246
R255
R240
R241
R242
R243
R244
R245
R246
R247
R248
R249
R250
R251
R252
R253
R254
R255
Reg.
No.
SCIERPR
SCIETPR
BRGHR0
Register
RDCPR0
RDAPR0
TDCPR0
BRGLR0
OC1HR0
OC2HR0
TDAPR0
OC1LR0
OC2LR0
SCIBRR
SCICR1
SCICR2
SCICR3
S_IVR0
IC1HR0
IC2HR0
S_ISR0
RXBR0
CHCR0
SOCR0
IC1LR0
IC2LR0
ACHR0
TXBR0
ACLR0
SCIDR
CR1_0
CR2_0
CR3_0
IDPR0
SICR0
SCISR
Name
ACR0
CCR0
CHR0
CLR0
IMR0
SR0
ST92F124/F150/F250 - REGISTER AND MEMORY MAP
Transmitter DMA Transaction Counter Pointer
Transmitter DMA Destination Address Pointer
Receiver DMA Transaction Counter Pointer
SCI Extended Transmit Prescaler Register
SCI Extended Receive Prescaler Register
Receiver DMA Source Address Pointer
Baud Rate Generator Low Register
Character Configuration Register
Output Compare 1 High Register
Output Compare 2 High Register
Address/Data Compare Register
Output Compare 1 Low Register
Output Compare 2 Low Register
Baud Rate Generator High Reg.
Alternate Counter High Register
Alternate Counter Low Register
Interrupt/DMA Priority Register
Input Capture 1 High Register
Input Capture 2 High Register
Input Capture 1 Low Register
Input Capture 2 Low Register
Clock Configuration Register
Synchronous Output Control
Transmitter Buffer Register
Synchronous Input Control
Interrupt Vector Register
Interrupt Status Register
SCI Baud Rate Register
Receive Buffer Register
Interrupt Mask Register
SCI Control Register 1
SCI Control Register 2
SCI Control Register 3
Counter High Register
Counter Low Register
SCI Status Register
SCI Data Register
Control Register 1
Control Register 2
Control Register 3
Status Register
Description
Reset
Value
Hex.
C0
FC
FC
FF
FF
xx
xx
x0
xx
xx
xx
00
03
01
xx
00
00
00
00
80
00
80
00
00
00
00
00
xx
xx
xx
xx
xx
xx
xx
xx
xx
xx
xx
xx
xx
xx
Page
Doc.
81/426
226
226
226
226
228
228
228
228
230
230
231
232
233
234
234
234
235
244
247
247
245
246
248
248
246
180
180
180
180
181
181
181
181
182
182
182
182
184
184
184
184
9