st92f124 STMicroelectronics, st92f124 Datasheet - Page 361

• Manufacturer Part Number: st92f124
• Description: 8/16-bit Single Voltage Flash Mcu Family With Ram, E3 Tmemulated Eeprom, Can 2.0b And J1850 Blpd
• Manufacturer: STMicroelectronics

10.11 10-BIT ANALOG TO DIGITAL CONVERTER (ADC)
10.11.1 Main Characteristics
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10.11.2 Introduction
The Analog to Digital Converter (ADC) consists of
an input multiplex channel selector feeding a suc-
cessive approximation converter.
Figure 155. ADC Block Diagram
EXTERNAL
TRIGGER
(from MFT0)
INTERNAL
TRIGGER
(EXTRG)
10-bit Resolution
Monotonicity: Guaranteed
No missing codes: Guaranteed
3-bit INTCLK/2 Frequency Prescaler
Internal/External Trigger availability
Continuous/Single Modes
Autoscan Mode
Power Down Mode
16 10-bit data registers (two per channel)
Two analog watchdogs selectable on adjacent
channels
CONTROL REG.2
(CLR2)
(CLR1)
CONTROL REG.1
CONTROL
LOGIC
DATA REGISTER H/L13
DATA REGISTER H/L12
DATA REGISTER H/L11
DATA REGISTER H/L10
DATA REGISTER H/L 8
DATA REGISTER H/L 5
DATA REGISTER H/L 4
DATA REGISTER H/L 3
DATA REGISTER H/L 2
DATA REGISTER H/L 0
DATA REGISTER H/L15
DATA REGISTER H/L14
DATA REGISTER H/L 9
DATA REGISTER H/L 7
DATA REGISTER H/L 6
DATA REGISTER H/L 1
COMPARE LOGIC
INTERRUPT UNIT
10-BIT ANALOG TO DIGITAL CONVERTER (ADC)
AUTOSCAN LOGIC
The conversion time depends on the INTCLK fre-
quency and the prescaler factor stored in the
PR[2:0] bits of the CLR2 register (R253-page 63)).
AV
ence voltage pins. Up to 16 multiplexed Analog In-
puts are available depending on the specific de-
vice type. With the AUTOSCAN feature, a group of
signals can be converted sequentially by simply
programming the starting address of the first ana-
log channel to be converted.
There are two Analog Watchdogs used for the
continuous hardware monitoring of two consecu-
tive input channels selectable by means of the
CC[3:0] bits in the CLR1 register (R252-page 63).
An Interrupt request is generated whenever the
converted value of either of these two analog in-
puts exceeds the upper or lower programmed
threshold values.
DD
10 bit
CONVERSION
and AV
RESULT
ANALOG TO DIGITAL
APPROXIMATION
SUCCESSIVE
COMPARE RESULT REGISTER
CONVERTER
THRESHOLD H/L REGISTER BU
THRESHOLD H/L REGISTER BL
THRESHOLD H/L REGISTER AH
THRESHOLD H/L REGISTER AL
SS
INT. CONTROL REGISTER
INT. VECTOR POINTER
CK PRESCALER
are the high and low level refer-
DIVIDER by 2
CKAD
INTCLK
ANALOG
MUX
ANALOG
SECTION
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