st92f124 STMicroelectronics, st92f124 Datasheet - Page 232

• Manufacturer Part Number: st92f124
• Description: 8/16-bit Single Voltage Flash Mcu Family With Ram, E3 Tmemulated Eeprom, Can 2.0b And J1850 Blpd
• Manufacturer: STMicroelectronics

MULTIPROTOCOL SERIAL COMMUNICATIONS INTERFACE (SCI-M)
MULTIPROTOCOL SERIAL COMMUNICATIONS INTERFACE (Cont’d)
CHARACTER
(CHCR)
R250 - Read/Write
Reset value: undefined
Bit 7 = AM: Address Mode.
This bit, together with the AMEN bit (in the IDPR
register), decodes the desired addressing/9th data
bit/character match operation. Please refer to the
table in the IDPR register description.
Bit 6 = EP: Even Parity.
0: Select odd parity (when parity is enabled).
1: Select even parity (when parity is enabled).
Bit 5 = PEN: Parity Enable.
0: No parity bit.
1: Parity bit generated (transmit data) or checked
Note: If the address/9th bit is enabled, the parity
bit will precede the address/9th bit (the 9th bit is
never included in the parity calculation).
232/426
9
AM
(received data).
7
EP
PEN
CONFIGURATION
AB
SB1
SB0
REGISTER
WL1
WL0
0
Bit 4 = AB: Address/9th Bit.
0: No Address/9th bit.
1: Address/9th bit included in the character format
Bit 3:2 = SB[1:0]: Number of Stop Bits..
Bit 1:0 = WL[1:0]: Number of Data Bits
between the parity bit and the first stop bit. This
bit can be used to address the SCI or as a ninth
data bit.
SB1
0
0
1
1
WL1
0
0
1
1
SB0
0
1
0
1
in 16X mode
WL0
0
1
0
1
Number of stop bits
1.5
2.5
1
2
Data Length
in 1X mode
5 bits
6 bits
7 bits
8 bits
1
2
2
3