st92f124 STMicroelectronics, st92f124 Datasheet - Page 230

• Manufacturer Part Number: st92f124
• Description: 8/16-bit Single Voltage Flash Mcu Family With Ram, E3 Tmemulated Eeprom, Can 2.0b And J1850 Blpd
• Manufacturer: STMicroelectronics

MULTIPROTOCOL SERIAL COMMUNICATIONS INTERFACE (SCI-M)
MULTIPROTOCOL SERIAL COMMUNICATIONS INTERFACE (Cont’d)
RECEIVER BUFFER REGISTER (RXBR)
R248 - Read only
Reset value: undefined
Bit 7:0 = RD[7:0]: Received Data.
This register stores the data portion of the re-
ceived word. The data will be transferred from the
Receiver Shift Register into the Receiver Buffer
Register at the end of the word. All receiver inter-
rupt conditions will be updated at the time of trans-
fer. If the selected character format is less than 8
bits, unused most significant bits will forced to “1”.
Note: RXBR and TXBR are two physically differ-
ent registers located at the same address.
230/426
9
RD7
7
RD6
RD5
RD4
RD3
RD2
RD1
RD0
0
TRANSMITTER BUFFER REGISTER (TXBR)
R248 - Write only
Reset value: undefined
Bit 7:0 = TD[7:0]: Transmit Data.
The ST9 core will load the data for transmission
into this register. The SCI will transfer the data
from the buffer into the Shift Register when availa-
ble. At the transfer, the Transmitter Buffer Register
interrupt is updated. If the selected word format is
less than 8 bits, the unused most significant bits
are not significant.
Note: TXBR and RXBR are two physically differ-
ent registers located at the same address.
TD7
7
TD6
TD5
TD4
TD3
TD2
TD1
TD0
0