st92f124 STMicroelectronics, st92f124 Datasheet - Page 387

• Manufacturer Part Number: st92f124
• Description: 8/16-bit Single Voltage Flash Mcu Family With Ram, E3 Tmemulated Eeprom, Can 2.0b And J1850 Blpd
• Manufacturer: STMicroelectronics

EXTERNAL BUS TIMING TABLE (MC=1)
(V
Notes:
The expressions in the “Formula” column show how to calculate the typical parameter value depending on the CPU clock
period and the number of inserted wait cycles. The values in the Min column give the parameter values for a CPU clock
at 12MHz and two wait states for T1 and T2.
For certain versions of the ST92F150, the external bus has high-drive capabilities.
Legend:
Tck = INTCLK period = OSCIN period when OSCIN is not divided by 2;
TckH = INTCLK high pulse width (normally = Tck/2, except when INTCLK = OSCIN, in which case it is OSCIN high pulse
width)
TckL = INTCLK low pulse width (normally = Tck/2, except when INTCLK = OSCIN, in which case it is OSCIN low pulse
width)
P = clock prescaling value (=PRS; division factor = 1+P)
Wa = wait cycles on ALE; = max (P, programmed wait cycles in EMR2, requested wait cycles with WAIT)
Wd
N°
10
11
12
13
14
15
16
17
1
2
3
4
5
6
7
8
9
DD
=
TsA (ALE)
ThALE (A)
TwALE
TdAz (OEN)
TdOEN(Az)
TwOEN
TwWEN
TdOEN (DR)
ThDR (OEN)
ThOEN(A)
ThWEN(A)
TvA(OEN)
TvA(WEN)
TsD (WEN)
ThWEN(DW)
TdALE (WEN)
TdALE (OEN)
= 5V
wait cycles on OEN and WEN ; = max (P, programmed wait cycles in WCR, requested wait cycles with WAIT)
Symbol
10%, T
= 2*OSCIN period when OSCIN is divided by 2;
=
OSCIN period / PLL factor when the PLL is enabled
A
Address Set-up Time before ALE
Address Hold Time after ALE
ALE High Pulse Width
Address Float (P0) to OEN
P0 driven after OEN
OEN Low Pulse Width
WEN Low Pulse Width
OEN
Data hold time after OEN
Address (A21:A8) hold time after OEN
Address (A21:A8) hold time after WEN
Address (A21:A0) valid to OEN
Address (A21:A0) valid to WEN
Data Set-up time before WEN
Data Hold Time after WEN
ALE
ALE
=
–
40°C to +125°C, C
to WEN
to OEN
to Data Valid Delay
Parameter
Delay
ST92F124/F150/F250 - ELECTRICAL CHARACTERISTICS
Delay
Load
= 0 to 50pF
Tck*Wa+TckH - 48
TckL - 31
Tck*Wa+TckH - 58
0
TckL - 13
Tck*Wd+TckH - 36
Tck*Wd+TckH - 36
Tck*Wd+TckH - 44
0
0
0
Tck (Wd+Wa+1.5) - 76
Tck (Wd+Wa+1.5) - 44
Tck*Wd+TckH - 158
TckL - 37
Tck (Wd+Wa+1.5) - 54
Tck (Wd+Wa+1.5) - 50
Formula
Value (see note)
Min
160
150
172
172
382
414
404
408
10
29
50
0
0
0
0
5
Max
164
387/426
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1