st92f124 STMicroelectronics, st92f124 Datasheet - Page 389

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st92f124

Manufacturer Part Number
st92f124
Description
8/16-bit Single Voltage Flash Mcu Family With Ram, E3 Tmemulated Eeprom, Can 2.0b And J1850 Blpd
Manufacturer
STMicroelectronics
Datasheet

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WATCHDOG TIMING TABLE
(V
unless otherwise specified)
Note: The value in the left hand column shows the formula used to calculate the timing minimum or maximum from the oscillator clock period,
watchdog prescaler and counter programmed values.
The value in the right hand two columns show the timing minimum and maximum for an internal clock (INTCLK) at 24MHz, with minimum and
maximum prescaler value and minimum and maximum counter value.
Measurement points are V
Legend:
Tck = INTCLK period = Crystal Oscillator Clock period when CLOCK1 is not divided by 2;
Psc = Watchdog Prescaler Register content (WDTPR): from 0 to 255
Cnt = Watchdog Couter Registers content (WDTRH,WDTRL): from 0 to 65535
T
WATCHDOG TIMING
WDIN
1
2
3
4
DD
= Watchdog Input signal period (WDIN), T
= 5V 10%, T
TwWDOL
TwWDOH
TwWDIL
TwWDIH
Symbol
Crystal Oscillator Clock period x PLL factor when the PLL is enabled.
2 x Crystal Oscillator Clock period when CLOCK1 is divided by 2;
WDOUT Low Pulse Width
WDOUT High Pulse Width
WDIN High Pulse Width
WDIN Low Pulse Width
A
OH
=
or V
40°C to +125°C, C
IH
for positive pulses and V
Parameter
ST92F124/F150/F250 - ELECTRICAL CHARACTERISTICS
WDIN
Load
x Tck
OL
= 50pF, f
or V
IL
4 x (Psc+1) x (Cnt+1) x Tck
4 x (Psc+1) x (Cnt+1) x Tck
(Psc+1) x (Cnt+1) x T
(Psc+1) x (Cnt+1) x T
for negative pulses.
INTCLK
Formula
4 x Tck
4 x Tck
= 24MHz, Push-pull output configuration,
Value
WDIN
WDIN
Min
167
333
167
333
167
167
Max
2.8
2.8
389/426
Unit
ns
ns
ns
ns
ns
ns
s
s
1

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