UPD784026 Renesas Electronics Corporation., UPD784026 Datasheet - Page 92
UPD784026
Manufacturer Part Number
UPD784026
Description
16/8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD784026.pdf
(759 pages)
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(3) Interrupt request enable flag (IE)
(4) Auxiliary carry flag (AC)
52
This flag controls CPU interrupt request acknowledgment operations.
When “0”, interrupts are disabled, and only non-maskable interrupts and unmasked macro service can be acknowledged.
All other interrupts are disabled.
When “1”, the interrupt enabled state is set, and enabling of interrupt request acknowledgment is controlled by the interrupt
mask flags corresponding to the individual interrupt requests and the priority of the individual interrupts.
The IE flag is set (1) by execution of an EI instruction, and reset (0) by execution of a DI instruction or acknowledgment of
an interrupt.
The AC flag is set (1) when there is a carry out of bit 3 or a borrow into bit 3 as the result of an operation, and reset (0)
otherwise.
This flag is used when the ADJBA or ADJBS instruction is executed.
Example The operation of the overflow flag when an 8-bit addition instruction is executed is shown below.
When the addition of 78H (+120) and 69H (+105) is performed, the operation result is E1H (+225), and the two’s
complement limit is exceeded, with the result that the P/V flag is set (1). Expressed as a two’s complement,
E1H is -31.
+)
When the following two negative numbers are added together, the operation result is within the two’s
complement range, and therefore the P/V flag is reset (0).
+)
78H (+120)
69H (+105)
FBH (–5)
F0H (–16)
=
= +) 0110
=
= +) 1111
0
CY
1
CY
0111
1110
1111
1110
CHAPTER 3 CPU ARCHITECTURE
1000
1001
0001
1011
0000
1011
=
=
–31 P/V = 1
–21 P/V = 0
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