UPD784026 Renesas Electronics Corporation., UPD784026 Datasheet - Page 84
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UPD784026
Manufacturer Part Number
UPD784026
Description
16/8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD784026.pdf
(759 pages)
- Current page: 84 of 759
- Download datasheet (3Mb)
3.4 INTERNAL DATA AREA
a LOCATION 0 instruction is executed) or FFFFFH (when a LOCATION 0FH instruction is executed). Selection of the addresses
of the internal data area by means of the LOCATION instruction must be executed once immediately after reset release, and
once the selection is made, it cannot be changed. The program after reset release must be as shown in the example below.
If the internal data area and another area are allocated to the same addresses, the internal data area is accessed and the other
area cannot be accessed.
44
The internal data area consists of the internal RAM area and special function register area (see Figures 3-1 to 3-4).
The last address of the internal data area can be specified by means of the LOCATION instruction as either 0FFFFH (when
Caution When the LOCATION 0 instruction is executed, it is necessary to ensure that the program after reset
release does not overlap the internal data area. It is also necessary to make sure that the entry addresses
of the processing routines for non-maskable interrupts such as NMI do not overlap the internal data area.
Also, initialization must be performed for maskable interrupt entry areas, etc., before the internal data area
is referenced.
Example
RSTVCT
INITSEG
RSTSTRT: LOCATION 0H; or LOCATION 0FH
CHAPTER 3 CPU ARCHITECTURE
CSEG
DW
CSEG
MOVG
to
AT 0
RSTSTRT
BASE
SP, #STKBGN
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