UPD784026 Renesas Electronics Corporation., UPD784026 Datasheet - Page 645

• Manufacturer Part Number: UPD784026
• Description: 16/8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

21.4.2 Operation
function is enabled, pins P66 and P67 operate as the HLDRQ and HLDAK pins respectively. The HLDRQ pin becomes
high-impedance, and the HLDAK pin outputs a low-level signal.
being executed the address bus (A8 to A19), address/data bus (AD0 to AD7), RD, WR and ASTB pins are all set to high-
impedance, the HLDAK pin output level is driven high, and the hold mode is established. Because the address bus, address/
data bus, RD, WR, and ASTB pins go into a high-impedance state at this time, it is recommended to connect a pull-up resistor
to the RD and WR pins, and a pull-down resistor to the ASTB pin.
external DMA controller, etc. is free to access the memory.
from high to low, and then the PD784026 resumes use of the local bus.
When a program is fetched from the internal memory, the instruction can be executed until an instruction that uses the local
bus interface appears. If the external memory is not accessed, therefore, execution of an instruction is not suspended.
is fetched from the external memory, the PD784026 continues executing the instructions already prefetched until an
instruction that uses the local bus interface appears, and suspends execution when an instruction using the local bus
interface appears or there are no more prefetched instructions. The suspended instruction is resumed from the point at
which it was suspended when the hold mode is released.
that uses the local bus interface appears.
When the HLDE bit of the hold mode register (HLDM) is set (1), the bus hold function is enabled. When the bus hold
If a high-level signal is input to the HLDRQ pin when the bus hold function is enabled, at the end of the access operation
While the HLDAK pin is high (in the hold mode) the PD784026 does not use the local bus interface, and therefore an
When the HLDRQ pin input level changes from high to low, the hold mode is released, the HLDAK pin level changes
A transition to the hold mode is performed between bus cycles, and the instruction being executed may be suspended.
If the hold mode is set while instructions that does not use the local bus interface are being executed when a program
When a program is fetched from the internal ROM or internal RAM, instruction execution is continued until an instruction
CHAPTER 21 LOCAL BUS INTERFACE FUNCTION
605