UPD784026 Renesas Electronics Corporation., UPD784026 Datasheet - Page 567

• Manufacturer Part Number: UPD784026
• Description: 16/8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

* 1. Low default priority
Remarks 1. “a” to “f” in the figure are arbitrary names used to differentiate between the interrupt requests and macro
2. High default priority
Figure 20-15 Differences in Level 3 Interrupt Acknowledgment According to IMC Register Setting
2. High/low default priorities in the figure indicate the relative priority levels of the two interrupt requests.
Interrupt Request e*
Interrupt Request f*
Interrupt Request a
Interrupt Request c
service requests.
(Level 3)
(Level 3)
(Level 3)
(Level 3)
Main Routine
Main Routine
Main Routine
IMC
2
IMC
IMC
1
EI
EI
EI
80H
00H
00H
Request d
(Level 3)
Interrupt
Request b
CHAPTER 20 INTERRUPT FUNCTIONS
(Level 3)
Interrupt
EI
f Processing
EI
c Processing
EI
a Processing
b Processing
e Processing
d Processing
The PRSL bit of the IMC is set to 1, and
nesting between level 3 interrupts is
disabled.
Even though interrupts are enabled, interrupt
request b is held pending since it has the
same priority as interrupt request a.
The PRSL bit of the IMC is set to 0, so that a
level 3 interrupt is acknowledged even during
level 3 interrupt processing (nesting is
possible).
Since level 3 interrupt request c is being
serviced in the interrupt enabled state and
PRSL = 0, interrupt request d, which is also
level 3, is acknowledged.
As interrupt request 3 and f are both of the
same level, the one with the higher default
priority, f, is acknowledged first.
When the interrupt enabled state is set
during processing of interrupt request f,
pending interrupt request e is acknowledged
since PRSL = 0.
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