UPD784026 Renesas Electronics Corporation., UPD784026 Datasheet - Page 496

• Manufacturer Part Number: UPD784026
• Description: 16/8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

Acknowledge Trigger Bit (W)
Acknowledge Enable Bit (R/W)
Acknowledge Detection Flag (R)
Busy Enable Bit (R/W)
456
ACKT
ACKE
ACKD
BSYE
Remark (R)
When ACKT is set after the end of a transfer, ACK is output in synchronization with the next SCK0. After the ACK
signal is output, ACKT is automatically cleared (0).
Cautions 1. Do not set (1) before the end of the serial transfer.
Clearing Conditions (ACKD = 0)
<1> On first fall of SCK0 after transfer start instruction
<2> When reset is input
<3> When CTXE = CRXE = 0
<4> When bus release is detected (slave mode only)
0
1
0
1
(W)
(R/W) : Read/write
Disables automatic output of the acknowledge signal
Before completion of transfer
After completion of transfer
<1> Disabling of automatic busy signal output
<2> Busy signal output is stopped in synchronization with the fall of SCK0 immediately after execution of the
The busy signal is output in synchronization with the fall of SCK0 following the acknowledge signal.
execution and busy release
2. ACKT cannot be cleared by software.
3. When ACKT is set, ACKE must be set to 0.
: Read-only
: Write-only
clearing instruction.
CHAPTER 17 CLOCKED SERIAL INTERFACE
Figure 17-12 SBIC Format (2/2)
ACK is output in synchronization with the 9th SCK0 clock cycle.
ACK is output in synchronization with SCK0 immediately after execution of
the setting instruction.
Setting Condition (ACKD = 1)
When the acknowledge signal (ACK) is detected