UPD784026 Renesas Electronics Corporation., UPD784026 Datasheet - Page 461

• Manufacturer Part Number: UPD784026
• Description: 16/8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

16.3.4 Operation When Transmission Only is Enabled
transmit operation starts when a write to the shift register (SIO1) is performed while the CTXE1 bit is set (1).
(1) When the internal clock is selected as the serial clock
(2) When an external clock is selected as the serial clock
A transmit operation is performed when the CTXE1 bit of clocked serial interface mode register (CSIM1) is set (1). The
When the CTXE1 bit is cleared (0), the SO1 pin is in the output high level.
When transmission starts, the serial clock is output from the SCK1 pin and data is output in sequence from SIO1 to
the SO1 pin in synchronization with the fall of the serial clock, and SI1 pin signals are shifted into SIO1 in synchronization
with the rise of the serial clock.
There is a delay of up to one SCK1 clock cycle between the start of transmission and the first fall of SCK1.
If transmission is disabled during the transmit operation (by clearing (0) the CTXE1 bit), SCK1 clock output is stopped
and the transmit operation is discontinued on the next rise of SCK1. In this case an interrupt request (INTCSI1) is not
generated, and the SO1 pin becomes output high level.
When transmission starts, data is output in sequence from SIO1 to the SO1 pin in synchronization with the fall of the
serial clock input to the SCK1 pin after the start of transmission, and SI1 pin signals are shifted into SIO1 in
synchronization with the rise of the SCK1 pin input. If transmission has not started, shift operations are not performed
and the SO1 pin output level does not change even if the serial clock is input to the SCK1 pin.
If transmission is disabled during the transmit operation (by clearing (0) the CTXE1 bit), the transmit operation is
discontinued and subsequent SCK1 input is ignored. In this case an interrupt request (INTCSI1) is not generated, and
the SO1 pin becomes output high level.
CHAPTER 16 ASYNCHRONOUS SERIAL INTERFACE/3-WIRE SERIAL I/O
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