UPD784026 Renesas Electronics Corporation., UPD784026 Datasheet - Page 402
UPD784026
Manufacturer Part Number
UPD784026
Description
16/8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD784026.pdf
(759 pages)
- Current page: 402 of 759
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12.3 OPERATION
12.3.1 Count Operation
(WDM). When overflow time specified by the WDM2 and WDM1 bits of WDM has elapsed after the RUN bit has been set
(1), a non-maskable interrupt (INTWDT) is generated.
is started again.
12.3.2 Interrupt Priorities
the NMI pin (NMI). The order of acknowledgment when an INTWDT interrupt and NMI interrupt are generated simultaneously
can be specified by the setting of bit 4 of the watchdog timer mode register (WDM).
to take precedence, INTWDT is not acknowledged until completion of execution of the NMI processing program.
362
The watchdog timer is cleared, and the count started, by setting (1) the RUN bit of the watchdog timer mode register
If the RUN bit is set (1) again before the overflow time elapses, the watchdog timer is cleared and the count operation
The watchdog timer interrupt (INTWDT) is a non-maskable interrupt. Other non-maskable interrupts are interrupts from
Even if INTWDT is generated while the NMI processing program is executed when NMI acknowledgement is specified
CHAPTER 12 WATCHDOG TIMER FUNCTION
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