UPD784026 Renesas Electronics Corporation., UPD784026 Datasheet - Page 643
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UPD784026
Manufacturer Part Number
UPD784026
Description
16/8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD784026.pdf
(759 pages)
- Current page: 643 of 759
- Download datasheet (3Mb)
(2) Self-refresh operation
This mode is used to retain the contents of pseudo-static RAM in standby mode.
* This time varies according to the speed rank, etc. of the pseudo-static RAM.
* Refreshing disabled time
(a) Self-refresh operating mode setting
(b) Return from self-refresh operation
When bit 4 (RFEN) of the refresh mode (RFM) register is set to “1”, and bit 7 (RFLV) to “0”, a low level is output
from the REFRQ pin, and the self-refresh operating mode is specified for the pseudo-static RAM.
Refresh pulse output to the pseudo-static RAM is disabled approximately 200 ns* after the REFRQ pin output level
changes from low to high. Therefore, the PD784026 arranges for refresh pulses not to be output during the
disabled time by raising the REFRQ pin in synchronization with the refresh timing counter.
To enable this low-to-high transition of the REFRQ pin level to be recognized, the RFLV bit read level is set (1)
when the REFRQ pin level changes from low to high.
Refresh Timing
Counter Output
RFLV Bit
REFRQ
Figure 21-19 Timing for Return from Self-Refresh Operation
CHAPTER 21 LOCAL BUS INTERFACE FUNCTION
Self Refresh Mode
Software Set Operation Execution
Approximately min. 200 ns*
603
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