UPD784026 Renesas Electronics Corporation., UPD784026 Datasheet - Page 194
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UPD784026
Manufacturer Part Number
UPD784026
Description
16/8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD784026.pdf
(759 pages)
- Current page: 194 of 759
- Download datasheet (3Mb)
5.10 PORT OUTPUT CHECK FUNCTION
systems. It is therefore possible to check the output data and the actual pin status as required. If there is a mismatch, appropriate
action can be taken, such as replacement with another system.
taking the exclusive OR of the pin status and the output latch contents (in port mode), or the pin status and the internal control
output signal level (in control mode).
154
The PD784026 has a function for reading and testing output port pin levels in order to improve the reliability of application
Special instructions, CHKL and CHKLA, are provided to check the port status. These instructions perform a comparison by
Example An example is shown below of a program that checks the pin status and output latch contents using the CHKL
Cautions 1. If each port is set to input mode, a comparison of the pin status with the output latch contents (or
instruction and CHKLA instruction.
TEST :
ERR1 :
2. If the output levels of a port in which control outputs and port outputs are mixed in a single port are
3. As port 2 is an input-only port, a comparison of the pin status with the output latch contents using
control output level) using the CHKL or CHKLA instruction will always show a match whether the
individual pins of the port are port pins or control pins.
Therefore, executing these instructions on a port set to input mode is actually ineffective.
checked with the CHKL or CHKLA instruction, the input/output mode of control output pins should
be set to input mode before executing these instructions (as the output levels of control outputs vary
asynchronously, the output level cannot be checked with the CHKL or CHKLA instruction).
the CHKL or CHKLA instruction will always show a match. Therefore, executing these instructions
on port 2 is actually ineffective.
SET1
CHKL
BNE
CHKLA
BT
BT
BT
BR
.
.
.
.
.
.
P0.3
P0
$ ERR1
P0
A.7, $BIT07
A.6, $BIT06
A.1, $BIT01
$BIT00
CHAPTER 5 PORT FUNCTIONS
; Set bit 3 of port 0
; Check port 0
; Branch to error processing (ERR1) in case of mismatch with output
; Faulty bit check
; Bit 7?
; Bit 6?
; Bit 1?
; If none of the bits, bit 0 is faulty
latch contents
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