UPD784026 Renesas Electronics Corporation., UPD784026 Datasheet - Page 179
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UPD784026
Manufacturer Part Number
UPD784026
Description
16/8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD784026.pdf
(759 pages)
- Current page: 179 of 759
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5.8 PORT 6
(P64 to P67 in the PD784021) incorporate a software programmable pull-up resistor.
Operations as control pins are performed by the respective function operations.
are undefined.
to P67 are set as input port pins (output high-impedance state). In the PD784021, the high-order 4 bits of the output latch
contents are undefined, and the low-order 4 bits are 0H.
P60 to P63
P64
P65
P66
P67
Pin Name
Port 6 is an 8-bit input/output port with an output latch (in the PD784021, P60 to P63 are output-only port pins). P60 to P67
In addition to its function as a port, port 6 also has various dual-function control signal pin functions as shown in Table 5-9.
In the PD784021, P64 and P65 only function as the RD output and WR output, respectively.
When RESET is input, P60 to P67 are set as input port pins (output high-impedance state), and the output latch contents
In the PD784021, P60 to P63 become high-impedance when RESET is input, and are driven low after RESET release. P64
* Output ports in the PD784021
Caution In the PD784021, P60 to P63 are in the output high-impedance state during RESET input, but output a low
Remark See CHAPTER 21 LOCAL BUS INTERFACE FUNCTION for details.
level after RESET release. Therefore, external circuitry should be designed so that output of a low-level
signal as the initial state is no problem.
Input/output ports*
Input/output ports
Port Mode
A16 to A19 outputs
RD output
WR output
WAIT input
HLDRQ input
HLDAK output
REFRQ output
Control Signal Input/
Table 5-9 Port 6 Operating Modes
Output Mode
CHAPTER 5 PORT FUNCTIONS
Specified by bits MM3 to MM0 of the MM in 2-bit units
Specified by bits PWn1 & PWn0 (n = 0 to 7) of the PWC1 &
Bus hold enabled by the HLDE bit of the HLDM
Set (1) the RFEN bit of the RFM
In the PD784021, external memory extension mode specified
by bits MM3 to MM0 of the MM
PWC2 or setting P66 in the input mode
Operation to Operate as Control Pins
139
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