UPD784026 Renesas Electronics Corporation., UPD784026 Datasheet - Page 454
UPD784026
Manufacturer Part Number
UPD784026
Description
16/8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD784026.pdf
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16.2.7 Receive Errors
of data reception, an error flag is raised in the asynchronous serial interface status register (ASIS) and a receive error
interrupt (INTSER) is generated. Receive error causes are shown in Table 16-2.
(see Figures 16-4 and 16-8).
(if there is an error in the next data, the corresponding error flag is set).
414
Three kinds of errors can occur in a receive operation: parity errors, framing errors and overrun errors. As the result
It is possible to detect the occurrence of any of the above errors during reception by reading the contents of the ASIS
The contents of the ASIS register are cleared (0) by reading the receive buffer (RXB) or by reception of the next data
* If a receive error occurs while the ISRM bit is set (1), INTSR is not generated.
Remark In the PD784026, a break signal cannot be detected by hardware. As a break signal is a low-level signal
of two characters or more, a break signal may be judged to have been input if software detects the occurrence
of two consecutive framing errors in which the receive data was 00H. The chance occurrence of two
consecutive framing errors can be distinguished from a break signal by having the RxD pin level read by
software (confirmation is possible by setting “1” in bit 0 of the port 3 mode register (PM3) and reading port
3 (P3)) and confirming that it is “0”.
RxD (Input)
Parity error
Framing error
Overrun error
INTSER
INTSR*
Receive Error
CHAPTER 16 ASYNCHRONOUS SERIAL INTERFACE/3-WIRE SERIAL I/O
Transmit data parity specification and receive data parity do not match
Stop bit not detected
Reception of next data completed before data is read from receive buffer
START
Figure 16-8 Receive Error Timing
Table 16-2 Receive Error Causes
D0
D1
D2
Cause
D6
D7
Parity
STOP
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