MSC8103M1100 Motorola / Freescale Semiconductor, MSC8103M1100 Datasheet - Page 44

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MSC8103M1100

Manufacturer Part Number
MSC8103M1100
Description
Network Processor, Networking Digital Signal Processor
Manufacturer
Motorola / Freescale Semiconductor
Datasheet

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Communications Processor Module (CPM) Ports
1-40
General-
Purpose
PC4
I/O
SMC1: SMRXD
SI2: L1ST4
FCC2: CD
HDLC serial, HDLC nibble,
and transparent
Peripheral Controller:
Name
Dedicated I/O
Protocol
Table 1-5. Port C Signals (Continued)
Dedicated
Direction
I/O Data
Output
Input
Input
SMC1: Receive Data
Supported by SMC1. The SMC interface consists of SMTXD,
SMRXD, SMSYN, and a clock. Not all signals are used for all
applications. SMCs are full-duplex ports that supports three
protocols or modes: UART, transparent, or general-circuit
interface (GCI).
Serial Interface 2: Layer 1 Strobe 4
In the time-slot assigner supported by SI2. The MSC8103
time-slot assigner supports up to four strobe outputs that can
be asserted on a bit or byte basis. The strobe outputs are
useful for interfacing to other devices that do not support the
multiplexed interface or for enabling/disabling three-state I/O
buffers in a multiple-transmitter architecture. These strobes
can also generate output wave forms for such applications as
stepper-motor control.
FCC2: Carrier Detect
In the standard modem interface signals supported by FCC2
(RTS, CTS and CD). CD is asynchronous with the data.
Description

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