MSC8103M1100 Motorola / Freescale Semiconductor, MSC8103M1100 Datasheet - Page 2

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MSC8103M1100

Manufacturer Part Number
MSC8103M1100
Description
Network Processor, Networking Digital Signal Processor
Manufacturer
Motorola / Freescale Semiconductor
Datasheet

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Table of Contents
Data Sheet Conventions
ii
Chapter 1
Chapter 2
Chapter 3
Chapter 4
Index
Ordering Information, Disclaimer, and Contact Information .................................................................. Back Cover
OVERBAR
“asserted”
“deasserted”
Examples:
Note: Values for V
Signal/ Connection Descriptions
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
Specifications
2.1
2.2
2.3
2.4
2.5
2.6
2.7
Packaging
3.1
3.2
3.3
Design Considerations
4.1
4.2
4.3
4.4
IL
Used to indicate a signal that is active when pulled low (For example, the RESET pin is active when
low.)
Means that a high true (active high) signal is high or that a low true (active low) signal is low
Means that a high true (active high) signal is low or that a low true (active low) signal is high
, V
OL
MSC8103 Features............................................................................................................................................. iii
Target Applications ............................................................................................................................................ iv
Product Documentation...................................................................................................................................... iv
Signal Groupings.............................................................................................................................................. 1-1
Power Signals................................................................................................................................................... 1-4
Clock Signals ................................................................................................................................................... 1-5
Reset, Configuration, and EOnCE Event Signals ............................................................................................ 1-6
System Bus, HDI16, and Interrupt Signals ...................................................................................................... 1-8
Memory Controller Signals............................................................................................................................ 1-16
Communications Processor Module (CPM) Ports ......................................................................................... 1-18
JTAG Test Access Port Signals...................................................................................................................... 1-44
Reserved Signals ............................................................................................................................................ 1-45
Introduction ...................................................................................................................................................... 2-1
Absolute Maximum Ratings ............................................................................................................................ 2-1
Recommended Operating Conditions .............................................................................................................. 2-2
Thermal Characteristics ................................................................................................................................... 2-3
DC Electrical Characteristics ........................................................................................................................... 2-3
Clock Configuration......................................................................................................................................... 2-4
AC Timings ...................................................................................................................................................... 2-8
Pin-Out and Package Information .................................................................................................................... 3-1
Lidded FC-PBGA Package Description........................................................................................................... 3-1
Lidded FC-PBGA Package Mechanical Drawing.......................................................................................... 3-32
Thermal Design Considerations....................................................................................................................... 4-1
Electrical Design Considerations ..................................................................................................................... 4-2
Power Considerations....................................................................................................................................... 4-2
Layout Practices ............................................................................................................................................... 4-4
, V
Signal/Symbol
IH
, and V
PIN
PIN
PIN
PIN
OH
are defined by individual product specifications.
Logic State
False
False
True
True
Signal State
Deasserted
Deasserted
Asserted
Asserted
Voltage
V
V
V
V
IH
IH
IL
IL
/V
/V
/V
/V
OL
OH
OH
OL

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