MSC8103M1100 Motorola / Freescale Semiconductor, MSC8103M1100 Datasheet - Page 21

• Manufacturer Part Number: MSC8103M1100
• Description: Network Processor, Networking Digital Signal Processor
• Manufacturer: Motorola / Freescale Semiconductor

POE
PSDRAS
PGPL2
PSDCAS
PGPL3
PGTA
PUPMWAIT
PPBS
PGPL4
PSDAMUX
PGPL5
Signal
Output
Output
Output
Output
Output
Output
Output
Output
Output
Flow
Data
Input
Input
Table 1-2. Memory Controller Signals (Continued)
Bus Output Enable
Output of the bus GPCM. Controls the output buffer of memory devices during read
operations.
Bus SDRAM RAS
Output from the bus SDRAM controller. This pin should connect to the SDRAM
Row Address Strobe (RAS) input signal.
Bus UPM General-Purpose Line 2
One of six general-purpose output lines from the UPM. The values and timing of
this pin are programmed in the UPM.
Bus SDRAM CAS
Output from the bus SDRAM controller. This pin should connect to the SDRAM
Column Address Strobe (CAS) input signal.
Bus UPM General-Purpose Line 3
One of six general-purpose output lines from the UPM. The values and timing of
this pin are programmed in the UPM.
GPCM TA
Terminates transactions during GPCM operation. Requires an external pull up
resistor for proper operation.
Bus UPM Wait
Input to the UPM. An external device can hold this pin high to force the UPM to wait
until the device is ready for the operation to continue.
Bus Parity Byte Select
In systems in which data parity is stored in a separate chip, this output is the
byte-select for that chip.
Bus UPM General-Purpose Line 4
One of six general-purpose output lines from the UPM. The values and timing of
this pin are programmed in the UPM.
Bus SDRAM Address Multiplexer
Controls the SDRAM address multiplexer when the MSC8101 is in External Master
mode.
Bus UPM General-Purpose Line 5
One of six general-purpose output lines from the UPM. The values and timing of
this pin are programmed in the UPM.
Description
Memory Controller Signals
1-17