MSC8103M1100 Motorola / Freescale Semiconductor, MSC8103M1100 Datasheet - Page 22

• Manufacturer Part Number: MSC8103M1100
• Description: Network Processor, Networking Digital Signal Processor
• Manufacturer: Motorola / Freescale Semiconductor

Communications Processor Module (CPM) Ports
1.7 Communications Processor Module (CPM) Ports
1-18
The MSC8103 CPM supports a subset of signals included in the MPC8260. The following sections
describe the functionality of the signals in the MSC8103.
• The MSC8103 CPM includes the following set of communication controllers:
• Two full-duplex Fast Serial Communications Controllers (FCCs) that support:
• One FCC that operates with the TSA only
• Two Multi-Channel Controllers (MCCs) that together can handle up to 256 HDLC/transparent
• Two full-duplex serial communications controllers (SCCs) that support the following protocols:
• Two additional SCCs that operate with the TSA only
• Two full-duplex Serial Management Controllers (SMCs) that support the following protocols:
• Serial Peripheral Interface (SPI) support for master or slave operation
• Inter-Integrated Circuit (I
• Time-Slot Assigner (TSA) that supports multiplexing from any of the SCCs, FCCs, SMCs, and two
The individual sets of externals signals associated with a specific protocol and data transfer mode are
multiplexed across any or all of the ports, as shown in Figure 1-2. The following sections provide
detailed descriptions of the signals supported by Ports A–Port D.
— Asynchronous Transfer Mode (ATM) through a UTOPIA 8 interface (FCC1 only)—The
— IEEE 802.3/Fast Ethernet through a Media-Independent Interface (MII)
— High-Level Data Link Control (HDLC) Protocol:
— Transparent mode serial operation
channels at 64 Kbps each, multiplexed on up to four TDM interfaces
— IEEE 802.3/Fast Ethernet through a Media-Independent Interface (MII)
— HDLC Protocol:
— Synchronous Data Link Control (SDLC)
— LocalTalk (HDLC-based local area network protocol)
— Universal Asynchronous Receiver/Transmitter (UART)
— Synchronous UART (1x clock mode)
— Binary Synchronous (BISYNC) communication
— Transparent mode serial operation
— General Circuit Interface (GCI)/Integrated Services Digital Network (ISDN) monitor and C/I
— UART
— Transparent mode serial operation
MCCs onto four time-division multiplexed (TDM) interfaces. The TSA uses two Serial Interfaces (SI1
and SI2). SI1 uses TDMA1 which supports both serial and nibble mode. SI2 does not support nibble
mode and includes TDMB2, TDMC2, and TDMD2 which operate only in serial mode.
MSC8103 can operate as one of the following:
°
°
°
°
°
°
°
channels (TSA only)
UTOPIA slave device
UTOPIA multi-PHY master device using direct polling for up to 4 PHY devices
UTOPIA multi-PHY master device using multiplex polling that can address up to 31 PHY
devices at addresses 0–30 (address 31 is reserved as a null port).
Serial mode—Transfers data one bit at a time
Nibble mode—Transfers data four bits at a time
Serial mode—Transfers data one bit at a time
Nibble mode—Transfers data four bits at a time
2
C) bus controller