TMPM364F10FG Toshiba, TMPM364F10FG Datasheet - Page 714

• Manufacturer Part Number: TMPM364F10FG
• Manufacturer: Toshiba

Specifications of TMPM364F10FG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 144
• Package: LQFP(20x20)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 5
• Uart/sio (ch): 12
• Usb: Host
• Can: 1
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 16
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit

22.3
Registers
22.3.18
31-16
15-6
5-2
1
0
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
Bit
−
ADRSP[9:0]
−
OVRSP
ADRSPRF
Bit Symbol
Note:Access to this register must be a half word or a word access.
ADREGSP (AD Conversion Result Register SP)
31
23
15
0
0
0
7
0
-
-
ADRSP
R
R
R
R
R
Type
30
22
14
0
0
0
6
0
-
-
Read as "0".
AD conversion result
Top-priority AD conversion result is stored.
Read as "0".
Overrun flag
0: Not generated
1: Generated
If the conversion result is overwritten before reading <ADRSP>, "1" is set.
This bit is "0" cleared when it is read.
AD conversion result storage flag
0:Conversion result is not stored
1: Conversion result is stored.
If a conversion result is stored, "1" is set.
This bit is "0" cleared when the conversion result is read.
29
21
13
0
0
0
5
0
-
-
-
Page 688
28
20
12
0
0
0
4
0
-
-
-
ADRSP
27
19
11
Function
0
0
0
3
0
-
-
-
26
18
10
0
0
0
2
0
-
-
-
OVRSP
25
17
0
0
9
0
1
0
-
-
TMPM364F10FG
ADRSPRF
24
16
0
0
8
0
0
0
-
-