TMPM364F10FG Toshiba, TMPM364F10FG Datasheet - Page 692
TMPM364F10FG
Manufacturer Part Number
TMPM364F10FG
Description
Manufacturer
Toshiba
Datasheet
1.TMPM364F10FG.pdf
(838 pages)
Specifications of TMPM364F10FG
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
1024K
Rom Type
Flash
Ram (kbytes)
64K
Number Of Pins
144
Package
LQFP(20x20)
Vcc
3V
Cpu Mhz
64
Ssp (ch) Spi
1
I2c/sio (ch)
5
Uart/sio (ch)
12
Usb
Host
Can
1
Ethernet
-
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
16
12-bit Ad Converter
-
16-bit Timer / Counter
16
Motor / Igbt Control
-
Real Time Clock
Y
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
Y
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
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21.3
BACKUP Mode Operation
CPU status
transition
Release source
(Positive logic)
Internal 1.5V
Always-on block
Internal 1.5V
Power shutdonw
block
High-spped
oscillation
(Internal signal)
Low-speed
oscillation
(Internal signal)
Internal RESET
(Shutdown block)
PORT status
External RESET
21.3.1.4
ON
Note:"Figure 21-4 BACKUP mode sequence" shows the transition modes ; NORMAL→BACKUP
Stable oscillation
Stable oscillation
ON
High
BACKUP Mode Timing Chart
High
NORMAL
operation
STOP→NORMAL or NORMAL→BACKUP SLEEP→NORMAL. In this transition, a clock for warm
up counter is used high-speed oscillator. The warm up time must be set 500Éþs or more.
Preparation
period for
BACKUP
Figure 21-4 BACKUP mode sequence
Oscillation stopped:
Oscillation continued : BACKUP SLEEP
Oscillation stopped : BACKUP STOP
BACKUP SLEEP BACKUP STOP
Power suppy
shutdopnw period
Power suppy
shutdown
Page 666
Port keep
Power suppy recorvery time +
reset period
Warm up time
(Note)
Stable oscillation
Stable oscillation
TMPM364F10FG
NORMAL
operation
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