TMPM364F10FG Toshiba, TMPM364F10FG Datasheet - Page 416
TMPM364F10FG
Manufacturer Part Number
TMPM364F10FG
Description
Manufacturer
Toshiba
Datasheet
1.TMPM364F10FG.pdf
(838 pages)
Specifications of TMPM364F10FG
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
1024K
Rom Type
Flash
Ram (kbytes)
64K
Number Of Pins
144
Package
LQFP(20x20)
Vcc
3V
Cpu Mhz
64
Ssp (ch) Spi
1
I2c/sio (ch)
5
Uart/sio (ch)
12
Usb
Host
Can
1
Ethernet
-
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
16
12-bit Ad Converter
-
16-bit Timer / Counter
16
Motor / Igbt Control
-
Real Time Clock
Y
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
Y
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
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12.7
Clock Control
Table 12-6 Clock resolution to the Baud Rate Generator fc = 32 MHz, fs = 32.768kHz
φT0 selection
CGSYSCR
<FPSEL1>
0
1
Note 1: The prescaler output clock φTn must be selected so that the relationship "φTn ≤ fsys/2" is satis-
Note 2: Do not change the clock gear while SIO is operating.
Note 3: The "−" indicates that the setting is prohibited and the "*" indicates don’t care in the above table.
clock selection
CGSYSCR
<FPSEL0>
Peripheral
1 (fc)
*
fied (so that φTn is slower than fsys).
<GEAR[2:0]>
Clock gear
CGSYSCR
100 (fc/2)
101 (fc/4)
110 (fc/8)
000 (fc)
value
*
Prescaler clock se-
100 (fperiph/16)
101 (fperiph/32)
100 (fperiph/16)
101 (fperiph/32)
100 (fperiph/16)
101 (fperiph/32)
100 (fperiph/16)
101 (fperiph/32)
000 (fperiph/1)
001 (fperiph/2)
010 (fperiph/4)
011 (fperiph/8)
000 (fperiph/1)
001 (fperiph/2)
010 (fperiph/4)
011 (fperiph/8)
000 (fperiph/1)
001 (fperiph/2)
010 (fperiph/4)
011 (fperiph/8)
000 (fperiph/1)
001 (fperiph/2)
010 (fperiph/4)
011 (fperiph/8)
<PRCK[2:0]>
CGSYSCR
lection
*
Page 390
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fs/2 (61μs)
1
2
2
3
3
3
(0.0625 μs)
4
5
6
4
5
6
4
5
6
4
5
6
(0.125 μs)
(0.125 μs)
φT1
(0.25 μs)
(0.25 μs)
(0.25 μs)
(0.5 μs)
(1.0 μs)
(2.0 μs)
(0.5 μs)
(1.0 μs)
(2.0 μs)
(0.5 μs)
(1.0 μs)
(2.0 μs)
(0.5 μs)
(1.0 μs)
(2.0 μs)
−
−
−
−
−
−
fc/2
fc/2
fc/2
fs/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
Prescaler output clock resolution
3
3
3
3
4
5
6
7
8
4
5
6
7
8
4
5
6
7
8
4
5
6
7
8
φT4
(0.25 μs)
(0.25 μs)
(0.25 μs)
(244 μs)
(0.5 μs)
(1.0 μs)
(2.0 μs)
(4.0 μs)
(8.0 μs)
(0.5 μs)
(1.0 μs)
(2.0 μs)
(4.0 μs)
(8.0 μs)
(0.5 μs)
(1.0 μs)
(2.0 μs)
(4.0 μs)
(8.0 μs)
(0.5 μs)
(1.0 μs)
(2.0 μs)
(4.0 μs)
(8.0 μs)
−
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fs/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
10
10
10
10
9
9
9
9
5
5
6
7
8
5
6
7
8
5
6
7
8
5
6
7
8
φT16
(16.0 μs)
(16.0 μs)
(16.0 μs)
(16.0 μs)
(32.0 μs)
(32.0 μs)
(32.0 μs)
(32.0 μs)
(977 μs)
(1.0 μs)
(2.0 μs)
(4.0 μs)
(8.0 μs)
(1.0 μs)
(2.0 μs)
(4.0 μs)
(8.0 μs)
(1.0 μs)
(2.0 μs)
(4.0 μs)
(8.0 μs)
(1.0 μs)
(2.0 μs)
(4.0 μs)
(8.0 μs)
TMPM364F10FG
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fs/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
12
12
12
12
10
11
10
11
10
11
10
11
7
9
9
9
9
7
8
7
8
7
8
7
8
φT64
(128.0 μs)
(128.0 μs)
(128.0 μs)
(128.0 μs)
(3.91 ms)
(16.0 μs)
(16.0 μs)
(16.0 μs)
(16.0 μs)
(32.0 μs)
(64.0 μs)
(32.0 μs)
(64.0 μs)
(32.0 μs)
(64.0 μs)
(32.0 μs)
(64.0 μs)
(4.0 μs)
(8.0 μs)
(4.0 μs)
(8.0 μs)
(4.0 μs)
(8.0 μs)
(4.0 μs)
(8.0 μs)
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