TMPM364F10FG Toshiba, TMPM364F10FG Datasheet - Page 397

• Manufacturer Part Number: TMPM364F10FG
• Manufacturer: Toshiba

Specifications of TMPM364F10FG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 144
• Package: LQFP(20x20)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 5
• Uart/sio (ch): 12
• Usb: Host
• Can: 1
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 16
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit

12.4.6
31-8
7
6-5
4
3-1
0
After reset
After reset
After reset
After reset
bit symbol
bit symbol
bit symbol
bit symbol
Note 1: Specify all the modes first and then enable the <TXE> bit.
Note 2: Do not stop the transmit operation (by setting <TXE> = "0") when data is being transmitted.
Note 3: In the DMA transfer using transmit / receive interrupt of SIO, the full duplex transmission can not be used.
Bit
SCxMOD1 (Mode Control Register 1)
−
I2SC
FDPX[1:0]
TXE
SINT[2:0]
−
Bit Symbol
I2SC
31
23
15
0
0
0
7
0
-
-
-
R
R/W
R/W
R/W
R/W
R/W
Type
30
22
14
0
0
0
6
0
-
-
-
Read as "0".
IDLE
0: Stop
1: Operate
Specifies the IDLE mode operation.
Transfer mode setting
00: Transfer prohibited
01: Half duplex (Receive)
10: Half duplex (Transmit)
11: Full duplex
Configures the transfer mode in the I/O interface mode. Also configures the FIFO if it is enabled.
In the UART mode, it is used only to specify the FIFO configuration.
Transmit control (Note1) (Note2)
0: Disabled
1: Enabled
This bit enables transmission and is valid for all the transfer modes.
Interval time of continuous transmission (For I/O interface)
000: None
001: 1SCLK
010: 2SCLK
011: 4SCLK
100: 8SCLK
101: 16SCLK
110: 32SCLK
111: 64SCLK
This parameter is valid only for the I/O interface mode when SCLK pin output is selected. In other modes,
this function has no meaning.
Specifies the interval time of continuous transmission when double buffering or FIFO is enabled in the I/O in-
terface mode.
Write to "0".
FDPX
29
21
13
0
0
0
5
0
-
-
-
Page 371
TXE
28
20
12
0
0
0
4
0
-
-
-
27
19
11
Function
0
0
0
3
0
-
-
-
SINT
26
18
10
0
0
0
2
0
-
-
-
TMPM364F10FG
25
17
0
0
9
0
1
0
-
-
-
24
16
0
0
8
0
0
0
-
-
-
-