TMPM364F10FG Toshiba, TMPM364F10FG Datasheet - Page 589

• Manufacturer Part Number: TMPM364F10FG
• Manufacturer: Toshiba

Specifications of TMPM364F10FG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 144
• Package: LQFP(20x20)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 5
• Uart/sio (ch): 12
• Usb: Host
• Can: 1
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 16
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit

16.5.5
the mailbox is set. The receiving message will be stored in the first mailbox with a matching ID. Only if
there is no matching ID in the mailboxes 0 to 30, the receiving message will be compared to the receive-on-
ly mailbox (mailbox 31). If the <LAME> bit in mailbox 31 is set, the local acceptance mask register CAN-
LAM will be used.
For mailboxes 0 to 30, the global acceptance mask register CANGAM will be used if the bit <GAME> in
Figure 16-4 shows receive filtering.
Receive Filtering
ACR
0
Receive message ID
ACR
1
ACR
n
Figure 16-4 Receive filtering
AMR
0
Acceptance mask register
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AMR
1
AMR
n
Transmit request
TMPM364F10FG