TMPM364F10FG Toshiba, TMPM364F10FG Datasheet - Page 130

• Manufacturer Part Number: TMPM364F10FG
• Manufacturer: Toshiba

Specifications of TMPM364F10FG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 144
• Package: LQFP(20x20)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 5
• Uart/sio (ch): 12
• Usb: Host
• Can: 1
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 16
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit

7.6
Exception / Interrupt-Related Registers
31-30
29
28-7
6-0
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
7.6.2.22
Bit
−
TBLBASE
TBLOFF
−
Bit Symbol
TBLOFF
Vector Table Offset Register
31
23
15
0
0
0
7
0
-
R
R/W
R/W
R
Type
30
22
14
0
0
0
6
0
-
-
Read as 0,
Table base
The vector table is in:
0: Code space
1: SRAM space
Offset value
Set the offset value from the top of the space specified in TBLBASE.
The offset must be aligned based on the number of exceptions in the table.This means that the minimum
alignment is 32 words that you can use for up to 16 interrupts.For more interrupts, you must adjust the align-
ment by rounding up to the next power of two.
Read as 0,
TBLBASE
29
21
13
0
0
0
5
0
-
Page 104
28
20
12
0
0
0
4
0
-
TBLOFF
TBLOFF
27
19
11
Function
0
0
0
3
0
-
TBLOFF
26
18
10
0
0
0
2
0
-
25
17
0
0
9
0
1
0
-
TMPM364F10FG
24
16
0
0
8
0
0
0
-