TMPM364F10FG Toshiba, TMPM364F10FG Datasheet - Page 10
TMPM364F10FG
Manufacturer Part Number
TMPM364F10FG
Description
Manufacturer
Toshiba
Datasheet
1.TMPM364F10FG.pdf
(838 pages)
Specifications of TMPM364F10FG
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
1024K
Rom Type
Flash
Ram (kbytes)
64K
Number Of Pins
144
Package
LQFP(20x20)
Vcc
3V
Cpu Mhz
64
Ssp (ch) Spi
1
I2c/sio (ch)
5
Uart/sio (ch)
12
Usb
Host
Can
1
Ethernet
-
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
16
12-bit Ad Converter
-
16-bit Timer / Counter
16
Motor / Igbt Control
-
Real Time Clock
Y
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
Y
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
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5. Reset
6. Clock / Mode Control
7. Exceptions
ii
5.1 Cold reset.................................................................................................................................31
5.2 Warm reset...............................................................................................................................33
5.3 After reset................................................................................................................................33
6.1 Features....................................................................................................................................35
6.2 Registers..................................................................................................................................36
6.3 Clock control...........................................................................................................................43
6.4 Modes and Mode Transitions..................................................................................................51
6.5 Operation Mode.......................................................................................................................52
6.6 Low Power Consumption Modes............................................................................................53
7.1 Overview..................................................................................................................................63
5.2.1
6.2.1
6.2.2
6.2.3
6.2.4
6.2.5
6.2.6
6.3.1
6.3.2
6.3.3
6.3.4
6.3.5
6.3.6
6.3.7
6.3.8
6.4.1
6.5.1
6.5.2
6.6.1
6.6.2
6.6.3
6.6.4
6.6.5
6.6.6
6.6.7
6.6.8
6.6.9
7.1.1
7.1.2
6.3.6.1
6.3.6.2
6.6.1.1
6.6.1.2
6.6.9.1
6.6.9.2
6.6.9.3
6.6.9.4
7.1.2.1
7.1.2.2
7.1.2.3
Reset period.......................................................................................................................................................................33
Register List.......................................................................................................................................................................36
CGSYSCR (System control register)................................................................................................................................37
CGOSCCR (Oscillation control register).........................................................................................................................39
CGSTBYCR (Standby control register)...........................................................................................................................40
CGPLLSEL (PLL Selection Register)..............................................................................................................................41
CGCKSEL (System clock selection register)...................................................................................................................42
Clock System Block Diagram...........................................................................................................................................43
Initial Values after Reset...................................................................................................................................................43
Clock system Diagram......................................................................................................................................................44
Clock Multiplication Circuit (PLL)..................................................................................................................................45
Warm-up function..............................................................................................................................................................47
System Clock.....................................................................................................................................................................49
Prescaler Clock Control.....................................................................................................................................................50
System Clock Pin Output Function..................................................................................................................................50
Mode Transitions...............................................................................................................................................................51
NORMAL mode................................................................................................................................................................52
SLOW mode......................................................................................................................................................................52
IDLE Mode (IDLE2, IDLE1)...........................................................................................................................................53
SLEEP mode......................................................................................................................................................................54
STOP mode........................................................................................................................................................................54
BACKUP mode (BACKUP STOP, BACKUP SLEEP)..................................................................................................54
Low power Consumption Mode Setting...........................................................................................................................55
Operational Status in Each Mode.....................................................................................................................................56
Releasing the Low Power Consumption Mode................................................................................................................57
Warm-up............................................................................................................................................................................59
Clock Operation in Mode Transition................................................................................................................................61
Exception types..................................................................................................................................................................63
Handling Flowchart...........................................................................................................................................................64
High-speed clock
Low-speed clock
IDLE2 mode
IDLE1 mode
Transition of operation modes : NORMAL → STOP → NORMAL
Transition of operation modes : NORMAL → SLEEP → NORMAL
Transition of operation modes : SLOW → STOP → SLOW
Transition of operation modes : SLOW → SLEEP → SLOW
Exception Request and Detection
Exception Handling and Branch to the Interrupt Service Routine (Pre-emption)
Executing an ISR
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