TMPM364F10FG Toshiba, TMPM364F10FG Datasheet - Page 515
TMPM364F10FG
Manufacturer Part Number
TMPM364F10FG
Description
Manufacturer
Toshiba
Datasheet
1.TMPM364F10FG.pdf
(838 pages)
Specifications of TMPM364F10FG
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
1024K
Rom Type
Flash
Ram (kbytes)
64K
Number Of Pins
144
Package
LQFP(20x20)
Vcc
3V
Cpu Mhz
64
Ssp (ch) Spi
1
I2c/sio (ch)
5
Uart/sio (ch)
12
Usb
Host
Can
1
Ethernet
-
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
16
12-bit Ad Converter
-
16-bit Timer / Counter
16
Motor / Igbt Control
-
Real Time Clock
Y
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
Y
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
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15. Consumer Electronics Control (CEC)
15.1
15.1.1
15.1.2
15.1.3
red to as CEC) protocol.
The CEC function transmits and receives data that conforms to Consumer Electronics Control (hereafter refer-
It can operate conformably to HDMI 1.3a specifications.
Outline
tor sends a new message beginning with the start bit without having sent the last block with EOM="1", a max-
imum cycle error is determined for the ACK bit and an interrupt is generated. Then, the receive operation is per-
formed in the usual way.
When data reception at logical address discrepancy is enabled(CECRCR1<CECOTH> = "1"), if the initia-
Reception
Transmission
Precautions
・ Clock sampling at fs clock or TBxOUT which is output of 16bit Timer/Event counters
・ Data reception per 1byte
・ Error detection
・ Data transmission per 1byte
・ Flexible waveform
・ Error detection
-Adjustable noise canceling time
-Flexible data sampling point
-Data reception is available even when an address discrepancy is detected.
-Cycle error (min./max.)
-ACK collision
-Waveform error
-Triggered by auto-detection of bus free state
-Adjustable rising edge and cycle
-Arbitration lost
-ACK response error
Page 489
TMPM364F10FG
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