TMPM364F10FG Toshiba, TMPM364F10FG Datasheet - Page 67
TMPM364F10FG
Manufacturer Part Number
TMPM364F10FG
Description
Manufacturer
Toshiba
Datasheet
1.TMPM364F10FG.pdf
(838 pages)
Specifications of TMPM364F10FG
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
1024K
Rom Type
Flash
Ram (kbytes)
64K
Number Of Pins
144
Package
LQFP(20x20)
Vcc
3V
Cpu Mhz
64
Ssp (ch) Spi
1
I2c/sio (ch)
5
Uart/sio (ch)
12
Usb
Host
Can
1
Ethernet
-
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
16
12-bit Ad Converter
-
16-bit Timer / Counter
16
Motor / Igbt Control
-
Real Time Clock
Y
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
Y
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
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6.2.5
31-16
15-12
11
10-9
8
7-3
2-1
0
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
Bit
−
RS[3:0]
−
IS[1:0]
C2S
ND[4:0]
−
PLLSEL
CGPLLSEL (PLL Selection Register)
Bit Symbol
31
23
15
0
0
0
7
0
-
-
R
R/W
R
R/W
R/W
R/W
R/W
R/W
Type
30
22
14
0
0
1
6
0
-
-
Read as "0".
Clock multiplied by PLL
0111: 4 times
1010: 8 times
Others: Reserved
Read as "0".
Clock multiplied by PLL
00: 8 times
01: 4 times
Others: Reserved
Clock multiplied by PLL
0: 4 times
1: 8 times
Clock multiplied by PLL
00011: 4 times
00111: 8 times
Others: Reserved
Write as "1".
Use PLL
0: Disuse. X1 selected
1: Use
Specifies use or disuse of the clock multiplied by the PLL.
"X1" is automatically set after reset. Resetting is required when using the PLL.
RS
ND
29
21
13
0
0
1
5
0
-
-
Page 41
28
20
12
0
0
1
4
1
-
-
27
19
11
Function
0
0
0
3
1
-
-
-
26
18
10
0
0
0
2
1
-
-
-
IS
25
17
0
0
9
1
1
1
-
-
-
TMPM364F10FG
PLLSEL
C2S
24
16
0
0
8
0
0
0
-
-
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