SI5040-D-GM Silicon Laboratories Inc, SI5040-D-GM Datasheet - Page 97

• Manufacturer Part Number: SI5040-D-GM
• Description: IC TXRX XFP 10GBPS 32LGA
• Manufacturer: Silicon Laboratories Inc

Specifications of SI5040-D-GM

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

*Note: TYPE: P = Power; AI = Analog Input; AO = Analog Output; DI = Digital Input; DO = Digital Output; DIO = Digital
22,21
30,29
Pin
24
25
26
2
3
9
Input/Output.
TXDOUT+
TXDOUT–
RX_LOS
RX_LOL
SPSEL
Name
SCK
TD+
TD–
SD
SS
Type*
DIO
DO
DO
AO
DI
DI
DI
AI
Table 13. Si5040 Pin Descriptions (Continued)
Differential CML Transmitter Data Input.
Differential CML Transmitter Data Output.
Open Drain
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
Level
or
Receiver Loss of Lock (Active High).
This output is asserted when the receiver path is in the loss-
of-lock state. If enabled in the receiver Interrupt Mask register,
this event may cause an interrupt. This pin is reflected as bit 4
in Register 9. The latched version of this pin is in Register 5,
bit 4.
In the absence of an external reference, the lock detect
circuitry uses a data quality measure to determine when
frequency lock has been lost with the incoming data stream.
This pin may also be programmed as a 622 MHz clock output
that is synchronous to the data applied at the transmitter data
(TD) input.
Receiver Loss of Signal (Active High).
The RX_LOS output is asserted when a loss-of-signal condi-
tion occurs for Analog LOS, Digital Count LOS, or Signal
Quality Monitor LOS.
High-speed XFI-compliant transmitter data input.
Data present at the TD input is retimed and output on the
TXDOUT pins.
Transmit range of operation is 9.95 Gbps to 11.3 Gbps.
Serial Port
Serial Clock.
Clock input for SPI-like and I
Serial Data.
Serial bidirectional data interface pin for the SPI-like or I
serial interface. This pin may be programmed as LVTTL or
open drain (by default) in Register 2. When in LVTTL mode,
the pin is initially in a high-impedance state.
SPI-like or I
In a logic low state, this input selects I
a logic high state, SPI-like mode of operation is selected. This
input has a weak internal pullup.
Chip Select.
Chip select pin for SPI-like interface, active low. This input has
a weak internal pullup. Note that this pin defines the I
the serial interface is in I
page 31 for details.
Rev. 0.86
2
C Bus Select.
2
Description
C mode. See "10.1. I2C Interface" on
2
C interface.
2
C mode of operation. In
Si5040
2
C when
2
C
97