SI5040-D-GM Silicon Laboratories Inc, SI5040-D-GM Datasheet - Page 36

• Manufacturer Part Number: SI5040-D-GM
• Description: IC TXRX XFP 10GBPS 32LGA
• Manufacturer: Silicon Laboratories Inc

Specifications of SI5040-D-GM

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Reg
10
12
13
15
16
17
18
20
21
22
24
25
26
27
28
29
11
0
1
2
3
4
5
6
7
8
9
RxSqmDeassert-
Si5040
13. Si5040 Register Summary
Any reserved bits listed in the table below or reserved registers (23, 54–55, 58–76, 78–83, 86–97, 99–105, 110–
130, 140–144, 148–151, 182–183, 185–204, 206–225, and 227–255) must not be written to a non-default value.
All reserved bits have the default values shown below.
36
RxChipConfig2
RxAlarmStatus
RxphaseAdjust
RxdPathConfig
RxdLosAssert-
RxCmuConfig
RxSqmConfig
Part Identifier
Part Identifier
aLosThresh2
RxSqmValue
RxCalConfig
RxLosStatus
ChipConfig1
ClearThresh
(Sticky Bits)
aLosThresh
RxintStatus
sliceConfig
RxintMask
RxLosCtrl
RxConfig
peakDet
peakDet
RxtpSel
RxdLos
sliceLvl
sliceLvl
Thresh
Thresh
Name
Default
40h
30h
58h
40h
15h
70h
60h
11h
N/A
29h
0h
0h
0h
0h
0h
0h
0h
Fh
Fh
0h
0h
0h
1h
0h
0h
5h
2h
tpChkInvert
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
losOpen
Drain
Bit 7
Reserved
lolOnLOS
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
intOpen
refLOS
refLOS
refLOS
dinvert
cmuBandwidth[3:0]
Drain
Bit 6
aLosHyst[3:0]
Revision[3:0]
tpChkSel[2:0]
clkOnLOS
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
intEnable
ltrOnLOS
Rev. 0.86
Bit 5
Receiver
LOS
LOS
LOS
RxSqmThresh[5:0]
SquelchOn-
RxdLosAssertThresh[7:0]
RxdLosClearThresh[7:0]
Reserved
Reserved
Reserved
Reserved
Reserved
spiOpen
CDRLT-
sqmLos
RxLOL
DATA
Drain
Bit 4
LOL
LOL
LOL
aLOSThresh[7:0]
Identifier[7:0]
peakDet[7:0]
sliceLvl[15:8]
sliceLvl[7:0]
RxphaseAdjust[6:0]
RxSqmDeassertThresh[5:0]
SquelchOn-
tpGenInvert
uselolMode
sqmLosEn
hardRecal
dLOSlast-
Reserved
Reserved
Reserved
Reserved
Reserved
RxLOS
Trigger
fifoErr
fifoErr
fifoErr
Bit 3
RxSqmValue[5:0]
Reserved
tpErrAlarm
tpErrAlarm
tpErrAlarm
Loopback
Reserved
Reserved
lineside-
Squelch
lolMode
dLOS
Bit 2
Identifier[3:0]
VCOCAL[1:0]
dLosEn[1:0]
tpGenSel[2:0]
sliceEn[2:0]
tpSyncLos
tpSyncLos
tpSyncLos
Reserved
Reserved
Reserved
XFILoop-
FIFOAu-
toReset
aLOS
Bit 1
back
aLosThresh[1:0]
ltr
peakDet[1:0]
FIFOReset
rxRefclkEn
refClkFreq
sqmAlarm
sqmAlarm
sqmAlarm
Reserved
swReset
aLosEn
RxPdn
Bit 0
LOS