SI5040-D-GM Silicon Laboratories Inc, SI5040-D-GM Datasheet - Page 85

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SI5040-D-GM

Manufacturer Part Number
SI5040-D-GM
Description
IC TXRX XFP 10GBPS 32LGA
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of SI5040-D-GM

Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Register 158. TxtpChkConfig
Reset settings = 0000 0010
Register 159. TxtpArbGenPtn
Reset settings = 1010 1010
Bit
7:3
1:0
Bit
7:0
2
Name
Name
Type
Type
Bit
Bit
tpTimeBase[1:0] Test Pattern Checker Timebase.
TxtpArbGenPtn[7:0] Transmitter Test Pattern Generator User Defined Pattern.
tpSyncMask
Reserved
Name
Name
D7
D7
Read returns zero.
Test Pattern Checker Sync Mask.
0 = Report loss of sync, followed by reset.
1 = After synchronization has been achieved a loss of sync will not be reported and the
pattern checker will not be reset.
The time or number of bits over which the pattern will be checked.
00 = continuous (infinite).
01 = (2
10 = (2
11 = (2
Note: Bit 0 in Register 159 is the LSB of the 64-bit user-defined pattern, and Bit 7 in Register
D6
D6
40
20
30
– 1024) bits
– 1024) bits
– 1024) bits
166 is the MSB. The transmit sequence is from LSB to MSB.
D5
D5
R
Rev. 0.86
TxtpArbGenPtn[7:0]
D4
D4
R/W
Function
D3
D3
Function
tpSyncMask
R/W
D2
D2
tpTimeBase[1:0]
D1
D1
Si5040
R/W
D0
D0
85

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