SI5040-D-GM Silicon Laboratories Inc, SI5040-D-GM Datasheet - Page 21

• Manufacturer Part Number: SI5040-D-GM
• Description: IC TXRX XFP 10GBPS 32LGA
• Manufacturer: Silicon Laboratories Inc

Specifications of SI5040-D-GM

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

CDR continuously tries to lock to
incoming data, and the VCO
frequency does not get re-centered
prior to the lock acquisition
process.
Ltr (bit 1 in Register 7)= 1?
ltrOnLos=0? (Default)
VCO stays at the
center of its
frequency range
awaiting for refClk.
LOLonLOS =0 and
VCOCAL[1:0] = 01?
LOLonLOS = 0 and
ltrOnLos = 1?
present?
Is refClk
Y
Y
N
Y
N
Y
Figure 12. CDR and VCO Behaviors Upon Declaring LOS (1 of 2)
Figure 13. CDR and VCO Behaviors Upon Declaring LOS (2 of 2)
Y
Y
The entire VCO frequency
range will be swiped to start the
CDR lock acquisition process.
CMU locks to the
reference clock until
LOS is clear. Note that
LOL will be off during
this period.
Since ltr has been set to 1
prior to the assertion of
LOS, CMU maintains lock
to the reference and the
CDR lock acquisition
depends on CDRLTDATA
control in Register 7.
VCOCAL[1:0] = 00?
present?
Is refClk
N
Y
From Previous Figure
LOLonLOS =1
and ltrOnLos =0?
Y
The internal VCO pull
range will be automatically
re-centered to the
reference clock frequency
to start the CDR lock
acquisition process.
Y
Invalid mode!
ltrOnLOS is enabled
but refClk is disabled.
Rev. 0.86
LOS=1?
VCOCAL[1:0] = X1?
Y
Y
The internal VCO pull range
will be automatically re-
centered to the reference
clock frequency to start the
CDR lock acquisition
process. Note that LOL will
not be cleared.
Y
and ltrOnLos = 1?
VCO stays at the center of its
frequency range awaiting for
refClk.
LOLonLOS = 0
VCOCAL[1:0] = 10
LOLonLOS =1 and
(Default)?
ltrOnLos =1?
present?
Is refClk
Next Figure
N
Y
Y
Y
and ltrOnLos = 1?
VCO stays at the center of
its frequency range awaiting
for refClk.
VCOCAL[1:0] = X0?
LOLonLOS = 1
present?
Is refClk
VCOCAL[1:0] = 11?
LOL will stay on.
Si5040
Invalid mode!
Y
N
Y
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