SI5040-D-GM Silicon Laboratories Inc, SI5040-D-GM Datasheet - Page 67

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SI5040-D-GM

Manufacturer Part Number
SI5040-D-GM
Description
IC TXRX XFP 10GBPS 32LGA
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of SI5040-D-GM

Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Register 52. RxtpChkErrCnt (MSB of a 40-bit Register)
Reset settings = undefined
Register 53. RxtpChkErr
Reset settings = undefined
Bit
7:0
Bit
7:0
Name
Name
Type
Type
Bit
Bit
RxtpChkErr[7:0] Receiver Test Pattern Checker Error.
RxtpChkErrCnt[39:32] Receiver Test Pattern Checker Error Count.
Name
Name
D39
D7
Measured error count in 8-bit floating point notation. The contents of this register are an
alternative format to the RxtpChkErrCnt.
Mantissa = bits [7:4]
Exponent = bits [3:0]
Error count = (Mantissa/16) x 16
0000 0000 = 0 (decimal)
1111 1111 = (15/16) x 16
D38
D6
When using a defined timebase, this register holds the error count from the last
completed timebase. In the continuous timebase setting, the register holds the
current running error count. Reading the least significant byte latches the upper
bytes.
Note: Combined registers 48 to 52,
0000000000 = 0 (decimal)
FFFFFFFFFF = 2
D37
D5
15
RxtpChkErrCnt[39:32]
(decimal)
Rev. 0.86
40
D36
RxtpChkErr[7:0]
D4
– 1 (decimal)
Exponent
R
R
Function
D35
Function
D3
D34
D2
D33
D1
Si5040
D32
D0
67

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