SI5040-D-GM Silicon Laboratories Inc, SI5040-D-GM Datasheet - Page 91

• Manufacturer Part Number: SI5040-D-GM
• Description: IC TXRX XFP 10GBPS 32LGA
• Manufacturer: Silicon Laboratories Inc

Specifications of SI5040-D-GM

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Register 175. TxtpTargetErr
Reset settings = 1111 1111
Register 176. TxtpChkErrCnt (LSB of a 40-bit Register)
Reset settings = undefined
Bit
7:0
Bit
7:0
Name
Name
Type
Type
Bit
Bit
TxtpChkErrCnt[7:0] Transmitter Test Pattern Checker Error Count.
TxtpTargetErr[7:0] Transmitter Test Pattern Checker Target Error Count.
Name
Name
D7
D7
When using a defined timebase, this register holds the error count from the last com-
pleted timebase. In the continuous timebase setting, the register holds the current
running error count. Reading the least significant byte LSB latches the upper bytes.
If the value in the TxtpChkErrCnt register (register 181) exceeds this target error
count, an interrupt will be generated. The value is represented as an 8-bit floating
point number.
Mantissa = bits[7:4]
Exponent = bits[3:0]
Base = 16
0000 0000 = 0 (decimal)
0101 0111 = (5/16) x 16
1111 1111 = (15/16) x 16
This register value does not represent a target bit error rate (BER). Rather, it is a target bit error
count for the period defined by tpTimeBase[1:0].
D6
D6
D5
D5
7
Rev. 0.86
15
D4
D4
TxtpChkErrCnt[7:0]
(decimal)
TxtpTargetErr[7:0]
(decimal)
R/W
R
D3
D3
Function
Function
D2
D2
D1
D1
Si5040
D0
D0
91