SI5040-D-GM Silicon Laboratories Inc, SI5040-D-GM Datasheet - Page 29

• Manufacturer Part Number: SI5040-D-GM
• Description: IC TXRX XFP 10GBPS 32LGA
• Manufacturer: Silicon Laboratories Inc

Specifications of SI5040-D-GM

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

6.7.3. Asynchronous Reference Clock Mode (Mode 2)
If an external asynchronous reference clock with jitter characteristics of higher quality than those of the recovered
XFI clock is available, the device can be operated in Asynchronous Reference Clock Mode (Figure 20). The mode
is set in TxCmuConfig (Register 134). The external reference clock is used as the timing source for the transmit
CMU. The resulting transmit clock is frequency locked to the incoming data, and the jitter on the transmit clock is
reduced due to the low jitter of the applied reference clock. The transmit CMU bandwidth may be set to 180 or
1370 Hz, depending on how much jitter is present on the applied reference clock. A FIFO in the data path
accommodates any jitter differences between the serial data and the CMU line-rate clock.
TXDOUT
TXDOUT
TXDOUT
CML
CML
CML
Figure 19. Synchronous Reference Clock (Mode 1)
Cleaned Up
Clock
Figure 18. Referenceless Mode (Mode 0)
FIFO
FIFO
FIFO
Figure 20. Mode 2
XFI Recovered
XFI Recovered
Jitter Attenuator
Clock
Data
Rev. 0.86
XFI Recovered Clock
XFI Recovered Data
DSPLL
Jitter Attenuator
CMU
XFI Recovered Data
Jitter Attenuator
XFI Recovered Clock
DSPLL
DSPLL
CMU
CMU
®
CDR
®
Phase
®
in
CDR
Phase
CDR
out
Equalizer
Asynch Ref Clock (Mode 2)
Reference Clock
Equalizer
Synchronous
Equalizer
Si5040
TD
TD
TD
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