SI5040-D-GM Silicon Laboratories Inc, SI5040-D-GM Datasheet - Page 70

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SI5040-D-GM

Manufacturer Part Number
SI5040-D-GM
Description
IC TXRX XFP 10GBPS 32LGA
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of SI5040-D-GM

Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Si5040
Register 98. RxLoopFAcq
Reset settings = 0001 1110
Register 106. sqmLOLThreshWrt
Reset settings = 0000 0000
70
Name
Name
Type
Type
Bit
6:0
Bit
5:0
Bit
Bit
7
7
6
sqmLOLThreshWrt Self-clearning strobe bit to apply sqmLOL Threshold from registers 107,108,109.
RxLoopFAcq[6:0]
RxLoopFAcqCtl
ThreshAdd[5:0]
sqmLOLThreshWrt
Reserved
RxLoopFAcqCtl
sqmLOL
Name
Name
R/W
R/W
D7
D7
Rx Acquistion Loop Filter Override.
1 = Use value written in Bit [6:0]. Set to 1 only when Rx LOL is asserted.
0 = Use internally generated value. Set to 0 when Rx LOL is deasserted.
Rx Loop Filter Setting for Acquisition.
Rx Loop filter override setting to be used during acquisiton. Set to 001 1000b
when Rx LOL is asserted and to 000 0000b when Rx LOL is deasserted.
Note that any read back may not return the last written value.
This is an indexing address register and requires the sqmLOL threshold address
to be set before writing data in the appropriate indexed data registers. For this
reason, it must first be written to 04h, followed by 84h. Refer to Section 5.8.1 for
more information about this register.
Do not change; must only write 0 to this bit.
Address for sqmLOL Threshold. Must be set to 4.
Reserved
R/W
D6
D6
Rev. 0.86
D5
D5
D4
D4
RxLoopFAcq[6:0]
Function
Function
sqmLOLThreshAdd[5:0]
R/W
D3
D3
R/W
D2
D2
D1
D1
D0
D0

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