SI5040-D-GM Silicon Laboratories Inc, SI5040-D-GM Datasheet - Page 59

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SI5040-D-GM

Manufacturer Part Number
SI5040-D-GM
Description
IC TXRX XFP 10GBPS 32LGA
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of SI5040-D-GM

Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Register 30. RxtpChkConfig
Reset settings = 0000 0010
Register 31. RxtpArbGenPtn
Reset settings = 1010 1010
Bit
7:3
1:0
Bit
7:0
2
Name
Type
Name
Bit
Type
Bit
tpTimeBase[1:0] Test Pattern Checker Timebase.
RxtpArbGenPtn[7:0] Receiver Test Pattern Generator User Defined Pattern.
tpSyncMask
Reserved
Name
Name
D7
D7
Read returns zero.
Test Pattern Checker Sync Mask.
0 = Normal operation.
1 = After synchronization has been achieved a loss of sync will not be reported and the
pattern checker will not be reset.
The time or number of bits over which the pattern will be checked.
00 = continuous (infinite).
01 = (2
10 = (2
11 = (2
D6
Note: Bit 0 in Register 31 is the LSB of the 64-bit user-defined pattern, and Bit 7 in Register
D6
40
20
30
– 1024) bits
– 1024) bits
– 1024) bits
38 is the MSB. The transmit sequence is from LSB to MSB.
D5
R
D5
D4
Rev. 0.86
RxtpArbGenPtn[7:0]
D4
D3
R/W
Function
Function
tpSyncMask
D3
R/W
D2
D2
D1
tpTimeBase[1:0]
D1
R/W
Si5040
D0
D0
59

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