R5F61668RD50FPV Renesas Electronics America, R5F61668RD50FPV Datasheet - Page 46
![no-image](/images/manufacturer_photos/0/5/560/renesas_electronics_america_sml.jpg)
R5F61668RD50FPV
Manufacturer Part Number
R5F61668RD50FPV
Description
MCU 3V 1024K I-TEMP 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet
1.R5F61668RN50FPV.pdf
(1506 pages)
Specifications of R5F61668RD50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F61668RD50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 1 Overview
1.3
Rev. 2.00 Sep. 24, 2008 Page 12 of 1468
REJ09B0412-0200
Block Diagram
[Legend]
CPU:
DTC:
BSC:
DMAC:
EXDMAC:
TM32K:
WDT:
Note:
POR/LVD*
Main clock
Subclock
oscillator
oscillator
H8SX
RAM
ROM
CPU
DTC
1.
2.
Central processing unit
Data transfer controller
Bus controller
DMA controller
EXDMA controller
32K timer
Watchdog timer
In external extended mode, only ports D and E can be used.
Supported only by the H8SX/1668MGroup.
2
In single-chip mode, the port D and port E functions can be used in the initial state.
Pin functions are selectable by setting the PCJKE bit in PFCRD.
Ports D and E are enabled when PCJKE=0 (initial value) and ports J and K are enabled
when PCJKE=1.
Figure 1.2 Block Diagram
EXDMAC ×
4 channels
4 channels
controller
Interrupt
DMAC ×
BSC
TMR:
TPU:
PPG:
SCI:
USB:
IIC2:
POR/LVD*
External bus
2
:
8-bit timer
16-bit timer pulse unit
Programmable pulse generator
Serial communications interface
Universal serial bus interface
IIC bus interface 2
Power-on reset / Low voltage detection circuit
PPG × 16 channels
PPG × 16 channels
TMR × 2 channels
TMR × 2 channels
TMR × 2 channels
TMR × 2 channels
TPU × 6 channels
TPU × 6 channels
IIC2 × 2 channels
SCI × 6 channels
channels (unit 0)
channels (unit 1)
10-bit AD × 4
10-bit AD × 4
2 channels
8-bit DA ×
TM32K
(unit 0)
(unit 1)
(unit 2)
(unit 3)
(unit 0)
(unit 1)
(unit 0)
(unit 1)
WDT
USB
port K*
port J*
Port D/
Port E/
Port M
Port A
Port B
Port C
Port F
Port H
Port 1
Port 2
Port 3
Port 5
Port 6
Port I
1
1
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