R5F61668RD50FPV Renesas Electronics America, R5F61668RD50FPV Datasheet - Page 345
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R5F61668RD50FPV
Manufacturer Part Number
R5F61668RD50FPV
Description
MCU 3V 1024K I-TEMP 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet
1.R5F61668RN50FPV.pdf
(1506 pages)
Specifications of R5F61668RD50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F61668RD50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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9.11.6
The CAS latency is controlled by bits W21 and W20 in WTCRB. Table 9.27 lists the setting and
CAS latency. CAS latency control cycles (Tcl) are inserted in a read cycle according to the W21
and W20 settings. WTCRB can be specified regardless of bit AST2 in ASTCR.
Figure 9.62 shows a timing example when SDRAM with a CAS latency of 3 is in use.
Bits W21 and W20 is initialized to B'11.
Table 9.27 CAS Latency Setting
W21
0
1
CAS Latency Control
W20
0
1
0
1
Description
Setting prohibited
SDRAM with CAS latency of 2 is in use
SDRAM with CAS latency of 3 is in use
SDRAM with CAS latency of 4 is in use
Rev. 2.00 Sep. 24, 2008 Page 311 of 1468
Section 9 Bus Controller (BSC)
Number of CAS
Latency Cycles
1
2
3
REJ09B0412-0200
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