R5F61668RD50FPV Renesas Electronics America, R5F61668RD50FPV Datasheet - Page 1242
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R5F61668RD50FPV
Manufacturer Part Number
R5F61668RD50FPV
Description
MCU 3V 1024K I-TEMP 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet
1.R5F61668RN50FPV.pdf
(1506 pages)
Specifications of R5F61668RD50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F61668RD50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 1242 of 1506
- Download datasheet (9Mb)
Section 26 Boundary Scan
26.4.1
JTIR is a 16-bit register. JTAG instructions can be transferred to JTIR by serial input from the
TDI pin. JTIR is initialized when the TRST signal is low level, when the TAP controller is in the
Test-Logic-Reset state, and when this LSI is placed in hardware standby mode. JTIR is not
initialized by a reset or entry to software standby mode. Instructions must be serially transferred in
4-bit units. When an instruction with more than 4 bits is being transferred, the last four bits of the
serial data are stored in JTIR.
Rev. 2.00 Sep. 24, 2008 Page 1208 of 1468
REJ09B0412-0200
Bit
15 to 12 TS[3:0]
11 to 0
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
Instruction Register (JTIR)
Bit Name
TS3
15
0
7
0
Initial
Value
All 0
All 0
TS2
14
0
6
0
R/W
R/W
R
TS1
13
0
5
0
Descriptions
Test Bit Set
Specify an instruction as shown in table 26.3.
Reserved
These bits are always read as 0. The write value should
always 0.
TS0
12
0
4
0
11
0
3
0
10
0
2
0
9
0
1
0
8
0
0
0
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