R5F61668RD50FPV Renesas Electronics America, R5F61668RD50FPV Datasheet - Page 355
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R5F61668RD50FPV
Manufacturer Part Number
R5F61668RD50FPV
Description
MCU 3V 1024K I-TEMP 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet
1.R5F61668RN50FPV.pdf
(1506 pages)
Specifications of R5F61668RD50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F61668RD50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 355 of 1506
- Download datasheet (9Mb)
9.11.12 Fast-Page Access Operation
Besides an accessing method in which this LSI outputs a row address every time it accesses the
SDRAM (called full access or normal access), some SDRAMs have a fast-page mode function in
which fast speed access can be achieved by modifying only a column address with the same row
address output when consecutive accesses are made to the same row address.
The fast-page mode can be used by setting the BE bit in DRAMCR to 1.
Figure 9.71 Connection Example of DQM Byte/Word Control
(Address shifted by 8 bis)
This LSI
D15 to D0
OE/CKE
DQMLU
DQMLL
RAS
CAS
SDφ
A12
A11
A10
WE
CS
A9
A8
A7
A6
A5
A4
A3
A2
A1
64-Mbit synchronous DRAM
(1 Mwords × 16 bits × 4 banks)
10-bit column address
RAS
CAS
WE
DQMU
DQML
CLK
CKE
CS
A11 (BA1)
A10 (BA0)
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
DQ15 to DQ0
Rev. 2.00 Sep. 24, 2008 Page 321 of 1468
Row address:
Column address:
Bank select address:
Section 9 Bus Controller (BSC)
A11 to A0
A9 to A0
A11/A10
REJ09B0412-0200
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