R5F61668RD50FPV Renesas Electronics America, R5F61668RD50FPV Datasheet - Page 1081
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R5F61668RD50FPV
Manufacturer Part Number
R5F61668RD50FPV
Description
MCU 3V 1024K I-TEMP 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet
1.R5F61668RN50FPV.pdf
(1506 pages)
Specifications of R5F61668RD50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F61668RD50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Bit
2
1
Bit Name
AL
AAS
Initial
Value
0
0
R/W
R/W
R/W
Description
Arbitration Lost Flag
This flag indicates that arbitration was lost in master
mode.
When two or more master devices attempt to seize the
bus at nearly the same time, the I2C bus monitors
SDA, and if the I2C bus interface detects data differing
from the data it sent, it sets AL to 1 to indicate that the
bus has been taken by another master.
[Setting conditions]
•
•
[Clearing condition]
•
Slave Address Recognition Flag
In slave receive mode, this flag is set to 1 when the first
frame following a start condition matches bits SVA6 to
SVA0 in SAR.
[Setting conditions]
•
•
[Clearing condition]
•
When the internal SDA and the SDA pin level
disagree at the rising of SCL in master transmit
mode
When the SDA pin outputs a high level in master
mode while a start condition is detected
When 0 is written to this bit after reading AL = 1
(When the CPU is used to clear this flag by writing
0 while the corresponding interrupt is enabled, be
sure to read the flag after writing 0 to it.)
When the slave address is detected in slave
receive mode
When the general call address is detected in slave
receive mode
When 0 is written to this bit after reading AAS = 1
Rev. 2.00 Sep. 24, 2008 Page 1047 of 1468
Section 21 I
2
C Bus Interface 2 (IIC2)
REJ09B0412-0200
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