R5F61668RD50FPV Renesas Electronics America, R5F61668RD50FPV Datasheet - Page 1035
![no-image](/images/manufacturer_photos/0/5/560/renesas_electronics_america_sml.jpg)
R5F61668RD50FPV
Manufacturer Part Number
R5F61668RD50FPV
Description
MCU 3V 1024K I-TEMP 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet
1.R5F61668RN50FPV.pdf
(1506 pages)
Specifications of R5F61668RD50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F61668RD50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Note:
• USBINTN0 signal
• USBINTN1 signal
• USBINTN2 signal
• USBINTN3 signal
• RESUME signal
Register
IFR2
DMAC start interrupt signal only EP1. See section 20.8, DMA Transfer.
DMAC start interrupt signal only EP2. See section 20.8, DMA Transfer.
The USBINTN2 signal requests interrupt sources for which the corresponding bits in interrupt
select registers 0 to 2 (ISR0 to ISR2) are cleared to 0. The USBINTN2 is driven low if a
corresponding bit in the interrupt flag register is set to 1.
The USBINTN3 signal requests interrupt sources for which the corresponding bits in interrupt
select registers 0 to 2 (ISR0 to ISR2) are cleared to 0. The USBINTN3 is driven low if a
corresponding bit in the interrupt flag register is set to 1.
The RESUME signal is a resume interrupt signal for canceling software standby mode and
deep software standby mode. The RESUME signal is driven low at the transition to the resume
state for canceling software standby mode and deep software standby mode.
*
EP0 interrupts must be assigned to the same interrupt request signal.
Bit
0
1
2
3
4
5
6
7
Transfer
Mode
Status
—
Status
—
Interrupt
Source
SETI
SETC
Reserved
CFDN
SURSF
SURSS
Reserved
Description
Set_Interface
command detection
Set_Configuration
command detection
Endpoint information
load end
Suspend/resume
detection
Suspend/resume
status
—
Rev. 2.00 Sep. 24, 2008 Page 1001 of 1468
Interrupt
Request
Signal
USBINTN2 or
USBINTN3
USBINTN2 or
USBINTN3
—
USBINTN2 or
USBINTN3
USBINTN2,
USBINTN3, or
RESUME
—
—
Section 20 USB Function Module (USB)
DTC
Activation
×
×
—
×
×
×
—
REJ09B0412-0200
DMAC
Activation
×
×
—
×
×
×
—
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