MCF5282CVM66 Freescale, MCF5282CVM66 Datasheet - Page 80
MCF5282CVM66
Manufacturer Part Number
MCF5282CVM66
Description
Manufacturer
Freescale
Datasheet
1.MCF5282CVM66.pdf
(766 pages)
Specifications of MCF5282CVM66
Cpu Family
MCF528x
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Interface Type
CAN/I2C/QSPI/UART
Total Internal Ram Size
64KB
# I/os (max)
150
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
3.3V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
256
Package Type
MA-BGA
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant
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Enhanced Multiply-Accumulate Unit (EMAC)
3.1.1.1
The MAC is an extension of the basic multiplier in most microprocessors. It is typically implemented in
hardware within an architecture and supports rapid execution of signal processing algorithms in fewer
cycles than comparable non-MAC architectures. For example, small digital filters can tolerate some
variance in an algorithm’s execution time, but larger, more complicated algorithms such as orthogonal
transforms may have more demanding speed requirements beyond scope of any processor architecture and
may require full DSP implementation.
To balance speed, size, and functionality, the ColdFire MAC is optimized for a small set of operations that
involve multiplication and cumulative additions. Specifically, the multiplier array is optimized for
single-cycle pipelined operations with a possible accumulation after product generation. This functionality
is common in many signal processing applications. The ColdFire core architecture is also modified to
allow an operand to be fetched in parallel with a multiply, increasing overall performance for certain DSP
operations.
Consider a typical filtering operation where the filter is defined as in
Here, the output y(i) is determined by past output values and past input values. This is the general form of
an infinite impulse response (IIR) filter. A finite impulse response (FIR) filter can be obtained by setting
coefficients a(k) to zero. In either case, the operations involved in computing such a filter are multiplies
and product summing. To show this point, reduce
Equation
3-2
3-2, in which the accumulated sum is a past data values and coefficients sum.
Introduction to the MAC
y i ( )
=
k
∑
3
=
0
b k ( )x i k
Figure 3-1. Multiply-Accumulate Functionality Diagram
(
y i ( )
–
)
=
=
N 1
k
∑
b 0 ( )x i ( )
=
–
Operand Y
1
a k ( )y i k
(
+
Accumulator(s)
–
b 1 ( )x i 1
Shift 0,1,-1
)
Equation 3-1
+
+ / -
X
(
N 1
k
∑
=
–
–
0
b k ( )x i k
)
Operand X
+
b 2 ( )x i 2
(
–
to a simple, four-tap FIR filter, shown in
(
)
–
Equation
)
+
b 3 ( )x i 3
(
3-1.
–
)
Freescale Semiconductor
Eqn. 3-1
Eqn. 3-2
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